arm/mm/tlb-v4wbi.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  *  Copyright (C) 1997-2002 Russell King
7  *  ARM architecture version 4 and version 5 TLB handling functions.
8  *  These assume a split I/D TLBs, with a write buffer.
15 #include <asm/asm-offsets.h>
17 #include "proc-macros.S"
22  *	Invalidate a range of TLB entries in the specified address space.
24  *	- start - range start address
25  *	- end   - range end address
26  *	- mm    - mm_struct describing address space
31 	act_mm	r3				@ get current->active_mm
40 	mcrne	p15, 0, r0, c8, c5, 1		@ invalidate I TLB entry
41 	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
52 1:	mcr	p15, 0, r0, c8, c5, 1		@ invalidate I TLB entry
53 	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
61 	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */