arm/mm/tlb-v4wb.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  *  Copyright (C) 1997-2002 Russell King
7  *  ARM architecture version 4 TLB handling functions.
8  *  These assume a split I/D TLBs w/o I TLB entry, with a write buffer.
15 #include <asm/asm-offsets.h>
17 #include "proc-macros.S"
23  *	Invalidate a range of TLB entries in the specified address space.
25  *	- start - range start address
26  *	- end   - range end address
27  *	- mm    - mm_struct describing address space
32 	act_mm	r3				@ get current->active_mm
38 	mcrne	p15, 0, r3, c8, c5, 0		@ invalidate I TLB
41 1:	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
50  *	Invalidate a range of TLB entries in the specified kernel
53  *	- start - virtual address (may not be aligned)
54  *	- end   - virtual address (may not be aligned)
61 	mcr	p15, 0, r3, c8, c5, 0		@ invalidate I TLB
62 1:	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
70 	/* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */