Lines Matching full:c1
34 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
37 mcr p15, 0, r0, c1, c0, 0 @ disable caches
57 mrc p15, 0, r2, c1, c0, 0 @ ctrl register
60 mcr p15, 0, r2, c1, c0, 0 @ disable MMU
148 mrc p15, 0, r8, c1, c0, 0 @ Control register
149 mrc p15, 0, r9, c1, c0, 1 @ Auxiliary control register
150 mrc p15, 0, r10, c1, c0, 2 @ Co-processor access control
181 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
183 mcrne p15, 0, r9, c1, c0, 1 @ No, so write it
184 mcr p15, 0, r10, c1, c0, 2 @ Co-processor access control
236 mrc p15, 1, r6, c15, c1, 0 @ save CP15 - extra features
238 mrc p15, 1, r8, c15, c1, 2 @ save CP15 - Aux Debug Modes Ctrl 2
239 mrc p15, 1, r9, c15, c1, 1 @ save CP15 - Aux Debug Modes Ctrl 1
248 mcr p15, 1, r6, c15, c1, 0 @ restore CP15 - extra features
250 mcr p15, 1, r8, c15, c1, 2 @ restore CP15 - Aux Debug Modes Ctrl 2
251 mcr p15, 1, r9, c15, c1, 1 @ restore CP15 - Aux Debug Modes Ctrl 1
279 * on. Return in r0 the new CP15 C1 control register setting.
309 ALT_SMP(mrc p15, 0, r0, c1, c0, 1)
313 mcrne p15, 0, r10, c1, c0, 1 @ No, update register
328 mrceq p15, 0, r0, c1, c0, 1 @ read aux control register
330 mcreq p15, 0, r0, c1, c0, 1 @ write aux control register
334 mrceq p15, 0, r0, c1, c0, 1 @ read aux control register
337 mcreq p15, 0, r0, c1, c0, 1 @ write aux control register
383 mrcle p15, 0, r0, c1, c0, 1 @ read aux control register
385 mcrle p15, 0, r0, c1, c0, 1 @ write aux control register
458 mrc p15, 1, r0, c15, c1, 1
462 mcr p15, 1, r0, c15, c1, 1
465 mrc p15, 1, r0, c15, c1, 2
468 mcr p15, 1, r0, c15, c1, 2
480 mrc p15, 1, r0, c15, c1, 0
482 mcr p15, 1, r0, c15, c1, 0
536 mrc p15, 0, r0, c0, c1, 0 @ read ID_PFR0 for ThumbEE
541 mcr p14, 6, r3, c1, c0, 0 @ Initialize TEEHBR to 0
554 mrc p15, 0, r0, c1, c0, 0 @ read control register