Lines Matching full:p15
47 mrc p15, 0, r0, c0, c0, 1 @ read cache type register
72 mcr p15, 1, r0, c15, c9, 0 @ clean L2
73 mcr p15, 0, r0, c7, c10, 4 @ drain WB
76 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
79 mcr p15, 0, r0, c1, c0, 0 @ disable caches
95 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
96 mcr p15, 0, ip, c7, c10, 4 @ drain WB
98 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
100 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
103 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
116 mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer
117 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
127 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
153 2: mcr p15, 0, ip, c7, c14, 2 @ clean + invalidate D set/way
161 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
162 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
181 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
182 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
184 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
185 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
191 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
220 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
221 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
225 mcr p15, 0, r0, c7, c10, 4 @ drain WB
241 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
246 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
247 mcr p15, 0, r0, c7, c10, 4 @ drain WB
256 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start
257 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
260 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
261 mcr p15, 0, r0, c7, c10, 4 @ drain WB
281 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
283 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
284 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
288 mcr p15, 0, r0, c7, c10, 4 @ drain WB
295 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
297 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
302 mcr p15, 5, r0, c15, c14, 0 @ D inv range start
303 mcr p15, 5, r1, c15, c14, 1 @ D inv range top
320 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
324 mcr p15, 0, r0, c7, c10, 4 @ drain WB
334 mcr p15, 5, r0, c15, c13, 0 @ D clean range start
335 mcr p15, 5, r1, c15, c13, 1 @ D clean range top
337 mcr p15, 0, r0, c7, c10, 4 @ drain WB
351 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
355 mcr p15, 0, r0, c7, c10, 4 @ drain WB
365 mcr p15, 5, r0, c15, c15, 0 @ D clean/inv range start
366 mcr p15, 5, r1, c15, c15, 1 @ D clean/inv range top
368 mcr p15, 0, r0, c7, c10, 4 @ drain WB
443 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
449 1: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry
454 mcr p15, 0, r0, c7, c10, 4 @ drain WB
479 mcreq p15, 0, ip, c7, c5, 0 @ invalidate I cache
480 mcreq p15, 0, ip, c7, c10, 4 @ drain WB
482 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
483 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
499 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
502 mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry
504 mcr p15, 0, r0, c7, c10, 4 @ drain WB
514 mrc p15, 0, r4, c13, c0, 0 @ PID
515 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
516 mrc p15, 0, r6, c1, c0, 0 @ Control register
523 mcr p15, 0, ip, c8, c7, 0 @ invalidate I+D TLBs
524 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches
526 mcr p15, 0, r4, c13, c0, 0 @ PID
527 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
528 mcr p15, 0, r1, c2, c0, 0 @ TTB address
537 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
538 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
540 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
545 mrc p15, 0, r0, c1, c0 @ get control register v4