1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Copyright (c) 2011-2013 Xilinx Inc.
19 #define SLCR_A9_CPU_RST_CTRL_OFFSET	0x244 /* CPU Software Reset Control */
34  * zynq_slcr_write - Write to a register in SLCR block
37  * @offset:	Register offset in SLCR block
41 static int zynq_slcr_write(u32 val, u32 offset)  in zynq_slcr_write()  argument
43 	return regmap_write(zynq_slcr_regmap, offset, val);  in zynq_slcr_write()
47  * zynq_slcr_read - Read a register in SLCR block
50  * @offset:	Register offset in SLCR block
54 static int zynq_slcr_read(u32 *val, u32 offset)  in zynq_slcr_read()  argument
56 	return regmap_read(zynq_slcr_regmap, offset, val);  in zynq_slcr_read()
60  * zynq_slcr_unlock - Unlock SLCR registers
72  * zynq_slcr_get_device_id - Read device code id
88  * zynq_slcr_system_restart - Restart the entire system.
104 	 * the FSBL not loading the bitstream after soft-reboot  in zynq_slcr_system_restart()
119  * zynq_slcr_cpu_start - Start cpu
120  * @cpu:	cpu number
122 void zynq_slcr_cpu_start(int cpu)  in zynq_slcr_cpu_start()  argument
127 	reg &= ~(SLCR_A9_CPU_RST << cpu);  in zynq_slcr_cpu_start()
129 	reg &= ~(SLCR_A9_CPU_CLKSTOP << cpu);  in zynq_slcr_cpu_start()
132 	zynq_slcr_cpu_state_write(cpu, false);  in zynq_slcr_cpu_start()
136  * zynq_slcr_cpu_stop - Stop cpu
137  * @cpu:	cpu number
139 void zynq_slcr_cpu_stop(int cpu)  in zynq_slcr_cpu_stop()  argument
144 	reg |= (SLCR_A9_CPU_CLKSTOP | SLCR_A9_CPU_RST) << cpu;  in zynq_slcr_cpu_stop()
149  * zynq_slcr_cpu_state - Read/write cpu state
150  * @cpu:	cpu number
152  * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1)
153  * 0 means cpu is running, 1 cpu is going to die.
155  * Return: true if cpu is running, false if cpu is going to die
157 bool zynq_slcr_cpu_state_read(int cpu)  in zynq_slcr_cpu_state_read()  argument
162 	state &= 1 << (31 - cpu);  in zynq_slcr_cpu_state_read()
168  * zynq_slcr_cpu_state - Read/write cpu state
169  * @cpu:	cpu number
170  * @die:	cpu state - true if cpu is going to die
172  * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1)
173  * 0 means cpu is running, 1 cpu is going to die.
175 void zynq_slcr_cpu_state_write(int cpu, bool die)  in zynq_slcr_cpu_state_write()  argument
180 	mask = 1 << (31 - cpu);  in zynq_slcr_cpu_state_write()
189  * zynq_early_slcr_init - Early slcr init function
199 	np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");  in zynq_early_slcr_init()
211 	np->data = (__force void *)zynq_slcr_base;  in zynq_early_slcr_init()
213 	zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr");  in zynq_early_slcr_init()
215 		pr_err("%s: failed to find zynq-slcr\n", __func__);  in zynq_early_slcr_init()
217 		return -ENODEV;  in zynq_early_slcr_init()