16 #define SCISOEN				0xc0
17 #define SCISODIS			0xc4
18 #define SCPERPWREN			0xd0
19 #define SCPERPWRDIS			0xd4
20 #define SCCPUCOREEN			0xf4
21 #define SCCPUCOREDIS			0xf8
22 #define SCPERCTRL0			0x200
23 #define SCCPURSTEN			0x410
24 #define SCCPURSTDIS			0x414
47  * CPU0_SRST_REQ_EN	(1 << 0)
54 #define CPU0_SRST_REQ_EN		(1 << 0)
56 #define HIX5HD2_PERI_CRG20		0x50
59 #define HIX5HD2_PERI_PMC0		0x1000
64 #define HIP01_PERI9                    0x50
77 	u32 val = 0;  in set_cpu_hi3620()
87 		writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN);  in set_cpu_hi3620()
119 		writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREDIS);  in set_cpu_hi3620()
152 	ctrl_base = of_iomap(node, 0);  in hi3xxx_hotplug_init()
160 	return 0;  in hi3xxx_hotplug_init()
166 		if (hi3xxx_hotplug_init() < 0)  in hi3xxx_set_cpu()
182 	ctrl_base = of_iomap(np, 0);  in hix5hd2_hotplug_init()
192 	u32 val = 0;  in hix5hd2_set_cpu()
230 		ctrl_base = of_iomap(np, 0);  in hip01_set_cpu()
260 	"	mrc	p15, 0, %0, c1, c0, 1\n"  in cpu_enter_lowpower()
261 	"	bic	%0, %0, #0x40\n"  in cpu_enter_lowpower()
262 	"	mcr	p15, 0, %0, c1, c0, 1\n"  in cpu_enter_lowpower()
263 	"	mrc	p15, 0, %0, c1, c0, 0\n"  in cpu_enter_lowpower()
264 	"	bic	%0, %0, #0x04\n"  in cpu_enter_lowpower()
265 	"	mcr	p15, 0, %0, c1, c0, 0\n"  in cpu_enter_lowpower()
267 	  : "r" (0)  in cpu_enter_lowpower()
275 	hi3xxx_set_cpu_jump(cpu, phys_to_virt(0));  in hi3xxx_cpu_die()
288 			return 0;  in hi3xxx_cpu_kill()