Lines Matching +full:non +full:- +full:pc
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/entry-armv.S
6 * ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
9 * Low-level vector interface routines
19 #include <asm/glue-df.h>
20 #include <asm/glue-pf.h>
27 #include <asm/uaccess-asm.h>
29 #include "entry-header.S"
74 @ Call the processor-specific abort handler:
76 @ r2 - pt_regs
77 @ r4 - aborted context pc
78 @ r5 - aborted context psr
98 ARM( stmib sp, {r1 - lr} )
99 THUMB( stmia sp, {r0 - r12} )
128 @ common_invalid - generic code for failed exception (re-entrant version of handlers)
133 ldmia r0, {r4 - r6}
135 mov r7, #-1 @ "" "" "" ""
137 stmia r0, {r5 - r7} @ lr_<exception>,
161 UNWIND(.save {r0 - pc} )
174 ARM( stmib sp, {r1 - r12} )
175 THUMB( stmia sp, {r0 - r12} ) @ No STMIB in Thumb-2
177 ldmia r0, {r3 - r5}
179 mov r6, #-1 @ "" "" "" ""
190 @ r2 - sp_svc
191 @ r3 - lr_svc
192 @ r4 - lr_<exception>, already fixed up for correct return/restart
193 @ r5 - spsr_<exception>
194 @ r6 - orig_r0 (see pt_regs definition in ptrace.h)
196 stmia r7, {r2 - r6}
249 @ Correct the PC such that it is pointing at the instruction
251 @ the PC will be pointing at the next instruction, and have to
252 @ subtract 4. Otherwise, it is Thumb, and the PC will be
272 mov r1, #4 @ PC correction to apply
274 THUMB( movne r1, #2 ) @ if so, fix up PC correction
324 stmfd sp!, {r1 - r2}
329 ldmfd sp!, {r1 - r2}
346 * EABI note: sp_svc is always 64-bit aligned here, so should PT_REGS_SIZE
357 ARM( stmib sp, {r1 - r12} )
358 THUMB( stmia sp, {r0 - r12} )
363 ldmia r0, {r3 - r5}
365 mov r6, #-1 @ "" "" "" ""
373 @ r4 - lr_<exception>, already fixed up for correct return/restart
374 @ r5 - spsr_<exception>
375 @ r6 - orig_r0 (see pt_regs definition in ptrace.h)
379 stmia r0, {r4 - r6}
381 THUMB( store_user_sp_lr r0, r1, S_SP - S_PC )
409 #warning "NPTL on non MMU needs fixing"
509 ARM( stmia ip!, {r4 - sl, fp, sp, lr} ) @ Store most regs on stack
510 THUMB( stmia ip!, {r4 - sl, fp} ) @ Store most regs on stack
547 ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously
550 ldmia r4, {r4 - sl, fp, ip, lr} @ Load all regs saved previously
583 @ involving the PC, and decorate them with PC-relative group
589 THUMB( bx pc )
594 str sp, [ip, #-4]! @ Preserve original SP value
600 push {fp, ip, lr, pc} @ GCC flavor frame record
602 str ip, [sp, #-8]! @ store original SP
612 UNWIND( .save {sp, pc} )
641 * Each segment is 32-byte aligned and will be moved to the top of the high
659 .if (. - \sym) & 3
660 .rept 4 - (. - \sym) & 3
664 .rept (\size - (. - \sym)) / 4
716 ldmfd sp!, {r4, r5, r6, pc}
726 sub r7, r7, #(0xffff0fff - (0xffff0f60 + (1b - __kuser_cmpxchg64)))
728 rsbscs r8, r8, #(2b - 1b)
737 #warning "NPTL on non MMU needs fixing"
738 mov r0, #-1
766 * the IRQ and data abort exception handlers to set the pc back
784 sub r7, r7, #(0xffff0fff - (0xffff0fc0 + (1b - __kuser_cmpxchg)))
786 rsbscs r8, r8, #(2b - 1b)
792 #warning "NPTL on non MMU needs fixing"
793 mov r0, #-1
807 /* beware -- each __kuser slot must be 8 instructions max */
816 ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init
825 .word ((__kuser_helper_end - __kuser_helper_start) >> 5)
842 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
844 * SP points to a minimal amount of processor-private memory, the address
852 @ isb not needed due to "movs pc, lr" in the vector stub
861 @ Save r0, lr_<exception> (parent PC)
883 ARM( ldr lr, [pc, lr, lsl #2] )
884 movs pc, lr @ branch to handler in SVC mode
895 @ Save r0, lr_<exception> (parent PC)
904 @ isb not needed due to "movs pc, lr" in the vector stub
959 * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
982 * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
1005 * Enter in UND mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
1030 *-----------------------------------------------------------------------------
1032 * (they're not supposed to happen, and won't happen in 32-bit data mode).
1040 *-----------------------------------------------------------------------------
1072 W(ldr) pc, .
1085 W(ldr) pc, .
1097 W(ldr) pc, .