Lines Matching +full:1 +full:a000
16 #address-cells = <1>;
17 #size-cells = <1>;
53 #address-cells = <1>;
54 #size-cells = <1>;
66 hdq1w: 1w@480b2000 {
67 compatible = "ti,omap2420-1w";
73 intc: interrupt-controller@1 {
76 #interrupt-cells = <1>;
93 ti,syss-mask = <1>;
96 #address-cells = <1>;
97 #size-cells = <1>;
107 #dma-cells = <1>;
117 #address-cells = <1>;
126 #address-cells = <1>;
142 mcspi2: spi@4809a000 {
167 uart1: serial@4806a000 {
197 timer2_target: target-module@4802a000 {
211 ti,syss-mask = <1>;
214 #address-cells = <1>;
215 #size-cells = <1>;
232 timer4: timer@4807a000 {
295 timer12: timer@4808a000 {
308 #address-cells = <1>;
309 #size-cells = <1>;