dts/st/stih418.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih418-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
11 		#address-cells = <1>;
12 		#size-cells = <0>;
15 			compatible = "arm,cortex-a9";
17 			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
18 			cpu-release-addr = <0x94100A4>;
22 			compatible = "arm,cortex-a9";
24 			/* u-boot puts hpen in SBC dmem at 0xa4 offset */
25 			cpu-release-addr = <0x94100A4>;
29 	usb2_picophy1: phy2 {
30 		compatible = "st,stih407-usb2-phy";
31 		#phy-cells = <0>;
35 		reset-names = "global", "port";
39 		compatible = "st,stih407-usb2-phy";
40 		#phy-cells = <0>;
44 		reset-names = "global", "port";
52 		ohci0: usb@9a03c00 {
53 			compatible = "st,st-ohci-300x";
59 			reset-names = "power", "softreset";
61 			phy-names = "usb";
64 		ehci0: usb@9a03e00 {
65 			compatible = "st,st-ehci-300x";
68 			pinctrl-names = "default";
69 			pinctrl-0 = <&pinctrl_usb0>;
73 			reset-names = "power", "softreset";
75 			phy-names = "usb";
78 		ohci1: usb@9a83c00 {
79 			compatible = "st,st-ohci-300x";
85 			reset-names = "power", "softreset";
87 			phy-names = "usb";
90 		ehci1: usb@9a83e00 {
91 			compatible = "st,st-ehci-300x";
94 			pinctrl-names = "default";
95 			pinctrl-0 = <&pinctrl_usb1>;
99 			reset-names = "power", "softreset";
101 			phy-names = "usb";
105 			assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
106 			assigned-clock-parents = <&clk_s_c0_pll1 0>;
107 			assigned-clock-rates = <200000000>;
111 			compatible = "st,stih407-thermal";
113 			clock-names = "thermal";