Lines Matching +full:rmobile +full:- +full:iic
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
46 #address-cells = <1>;
47 #size-cells = <0>;
51 compatible = "arm,cortex-a15";
53 clock-frequency = <1000000000>;
55 power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
56 enable-method = "renesas,apmu";
57 next-level-cache = <&L2_CA15>;
62 compatible = "arm,cortex-a15";
64 clock-frequency = <1000000000>;
66 power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
67 enable-method = "renesas,apmu";
68 next-level-cache = <&L2_CA15>;
71 L2_CA15: cache-controller-0 {
73 cache-unified;
74 cache-level = <2>;
75 power-domains = <&sysc R8A7792_PD_CA15_SCU>;
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
84 clock-frequency = <0>;
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
95 compatible = "arm,cortex-a15-pmu";
96 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
98 interrupt-affinity = <&cpu0>, <&cpu1>;
103 compatible = "fixed-clock";
104 #clock-cells = <0>;
106 clock-frequency = <0>;
110 compatible = "simple-bus";
111 interrupt-parent = <&gic>;
113 #address-cells = <2>;
114 #size-cells = <2>;
118 compatible = "renesas,r8a7792-wdt",
119 "renesas,rcar-gen2-wdt";
123 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
129 compatible = "renesas,gpio-r8a7792",
130 "renesas,rcar-gen2-gpio";
133 #gpio-cells = <2>;
134 gpio-controller;
135 gpio-ranges = <&pfc 0 0 29>;
136 #interrupt-cells = <2>;
137 interrupt-controller;
139 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
144 compatible = "renesas,gpio-r8a7792",
145 "renesas,rcar-gen2-gpio";
148 #gpio-cells = <2>;
149 gpio-controller;
150 gpio-ranges = <&pfc 0 32 23>;
151 #interrupt-cells = <2>;
152 interrupt-controller;
154 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
159 compatible = "renesas,gpio-r8a7792",
160 "renesas,rcar-gen2-gpio";
163 #gpio-cells = <2>;
164 gpio-controller;
165 gpio-ranges = <&pfc 0 64 32>;
166 #interrupt-cells = <2>;
167 interrupt-controller;
169 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
174 compatible = "renesas,gpio-r8a7792",
175 "renesas,rcar-gen2-gpio";
178 #gpio-cells = <2>;
179 gpio-controller;
180 gpio-ranges = <&pfc 0 96 28>;
181 #interrupt-cells = <2>;
182 interrupt-controller;
184 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
189 compatible = "renesas,gpio-r8a7792",
190 "renesas,rcar-gen2-gpio";
193 #gpio-cells = <2>;
194 gpio-controller;
195 gpio-ranges = <&pfc 0 128 17>;
196 #interrupt-cells = <2>;
197 interrupt-controller;
199 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
204 compatible = "renesas,gpio-r8a7792",
205 "renesas,rcar-gen2-gpio";
208 #gpio-cells = <2>;
209 gpio-controller;
210 gpio-ranges = <&pfc 0 160 17>;
211 #interrupt-cells = <2>;
212 interrupt-controller;
214 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
219 compatible = "renesas,gpio-r8a7792",
220 "renesas,rcar-gen2-gpio";
223 #gpio-cells = <2>;
224 gpio-controller;
225 gpio-ranges = <&pfc 0 192 17>;
226 #interrupt-cells = <2>;
227 interrupt-controller;
229 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
234 compatible = "renesas,gpio-r8a7792",
235 "renesas,rcar-gen2-gpio";
238 #gpio-cells = <2>;
239 gpio-controller;
240 gpio-ranges = <&pfc 0 224 17>;
241 #interrupt-cells = <2>;
242 interrupt-controller;
244 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
249 compatible = "renesas,gpio-r8a7792",
250 "renesas,rcar-gen2-gpio";
253 #gpio-cells = <2>;
254 gpio-controller;
255 gpio-ranges = <&pfc 0 256 17>;
256 #interrupt-cells = <2>;
257 interrupt-controller;
259 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
264 compatible = "renesas,gpio-r8a7792",
265 "renesas,rcar-gen2-gpio";
268 #gpio-cells = <2>;
269 gpio-controller;
270 gpio-ranges = <&pfc 0 288 17>;
271 #interrupt-cells = <2>;
272 interrupt-controller;
274 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
279 compatible = "renesas,gpio-r8a7792",
280 "renesas,rcar-gen2-gpio";
283 #gpio-cells = <2>;
284 gpio-controller;
285 gpio-ranges = <&pfc 0 320 32>;
286 #interrupt-cells = <2>;
287 interrupt-controller;
289 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
294 compatible = "renesas,gpio-r8a7792",
295 "renesas,rcar-gen2-gpio";
298 #gpio-cells = <2>;
299 gpio-controller;
300 gpio-ranges = <&pfc 0 352 30>;
301 #interrupt-cells = <2>;
302 interrupt-controller;
304 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
309 compatible = "renesas,pfc-r8a7792";
313 cpg: clock-controller@e6150000 {
314 compatible = "renesas,r8a7792-cpg-mssr";
317 clock-names = "extal";
318 #clock-cells = <2>;
319 #power-domain-cells = <0>;
320 #reset-cells = <1>;
324 compatible = "renesas,r8a7792-apmu", "renesas,apmu";
329 rst: reset-controller@e6160000 {
330 compatible = "renesas,r8a7792-rst";
334 sysc: system-controller@e6180000 {
335 compatible = "renesas,r8a7792-sysc";
337 #power-domain-cells = <1>;
340 irqc: interrupt-controller@e61c0000 {
341 compatible = "renesas,irqc-r8a7792", "renesas,irqc";
342 #interrupt-cells = <2>;
343 interrupt-controller;
350 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
355 compatible = "mmio-sram";
357 #address-cells = <1>;
358 #size-cells = <1>;
363 compatible = "mmio-sram";
365 #address-cells = <1>;
366 #size-cells = <1>;
369 smp-sram@0 {
370 compatible = "renesas,smp-sram";
377 compatible = "renesas,i2c-r8a7792",
378 "renesas,rcar-gen2-i2c";
382 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
384 i2c-scl-internal-delay-ns = <6>;
385 #address-cells = <1>;
386 #size-cells = <0>;
391 compatible = "renesas,i2c-r8a7792",
392 "renesas,rcar-gen2-i2c";
396 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
398 i2c-scl-internal-delay-ns = <6>;
399 #address-cells = <1>;
400 #size-cells = <0>;
405 compatible = "renesas,i2c-r8a7792",
406 "renesas,rcar-gen2-i2c";
410 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
412 i2c-scl-internal-delay-ns = <6>;
413 #address-cells = <1>;
414 #size-cells = <0>;
419 compatible = "renesas,i2c-r8a7792",
420 "renesas,rcar-gen2-i2c";
424 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
426 i2c-scl-internal-delay-ns = <6>;
427 #address-cells = <1>;
428 #size-cells = <0>;
433 compatible = "renesas,i2c-r8a7792",
434 "renesas,rcar-gen2-i2c";
438 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
440 i2c-scl-internal-delay-ns = <6>;
441 #address-cells = <1>;
442 #size-cells = <0>;
447 compatible = "renesas,i2c-r8a7792",
448 "renesas,rcar-gen2-i2c";
452 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
454 i2c-scl-internal-delay-ns = <110>;
455 #address-cells = <1>;
456 #size-cells = <0>;
461 #address-cells = <1>;
462 #size-cells = <0>;
463 compatible = "renesas,iic-r8a7792",
464 "renesas,rcar-gen2-iic",
465 "renesas,rmobile-iic";
471 dma-names = "tx", "rx", "tx", "rx";
472 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
477 dmac0: dma-controller@e6700000 {
478 compatible = "renesas,dmac-r8a7792",
479 "renesas,rcar-dmac";
497 interrupt-names = "error",
503 clock-names = "fck";
504 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
506 #dma-cells = <1>;
507 dma-channels = <15>;
510 dmac1: dma-controller@e6720000 {
511 compatible = "renesas,dmac-r8a7792",
512 "renesas,rcar-dmac";
530 interrupt-names = "error",
536 clock-names = "fck";
537 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
539 #dma-cells = <1>;
540 dma-channels = <15>;
544 compatible = "renesas,etheravb-r8a7792",
545 "renesas,etheravb-rcar-gen2";
549 clock-names = "fck";
550 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
552 #address-cells = <1>;
553 #size-cells = <0>;
558 compatible = "renesas,qspi-r8a7792", "renesas,qspi";
564 dma-names = "tx", "rx", "tx", "rx";
565 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
567 num-cs = <1>;
568 #address-cells = <1>;
569 #size-cells = <0>;
574 compatible = "renesas,scif-r8a7792",
575 "renesas,rcar-gen2-scif", "renesas,scif";
580 clock-names = "fck", "brg_int", "scif_clk";
583 dma-names = "tx", "rx", "tx", "rx";
584 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
590 compatible = "renesas,scif-r8a7792",
591 "renesas,rcar-gen2-scif", "renesas,scif";
596 clock-names = "fck", "brg_int", "scif_clk";
599 dma-names = "tx", "rx", "tx", "rx";
600 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
606 compatible = "renesas,scif-r8a7792",
607 "renesas,rcar-gen2-scif", "renesas,scif";
612 clock-names = "fck", "brg_int", "scif_clk";
615 dma-names = "tx", "rx", "tx", "rx";
616 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
622 compatible = "renesas,scif-r8a7792",
623 "renesas,rcar-gen2-scif", "renesas,scif";
628 clock-names = "fck", "brg_int", "scif_clk";
631 dma-names = "tx", "rx", "tx", "rx";
632 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
638 compatible = "renesas,hscif-r8a7792",
639 "renesas,rcar-gen2-hscif", "renesas,hscif";
644 clock-names = "fck", "brg_int", "scif_clk";
647 dma-names = "tx", "rx", "tx", "rx";
648 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
654 compatible = "renesas,hscif-r8a7792",
655 "renesas,rcar-gen2-hscif", "renesas,hscif";
660 clock-names = "fck", "brg_int", "scif_clk";
663 dma-names = "tx", "rx", "tx", "rx";
664 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
670 compatible = "renesas,msiof-r8a7792",
671 "renesas,rcar-gen2-msiof";
677 dma-names = "tx", "rx", "tx", "rx";
678 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
680 #address-cells = <1>;
681 #size-cells = <0>;
686 compatible = "renesas,msiof-r8a7792",
687 "renesas,rcar-gen2-msiof";
693 dma-names = "tx", "rx", "tx", "rx";
694 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
696 #address-cells = <1>;
697 #size-cells = <0>;
702 compatible = "renesas,can-r8a7792",
703 "renesas,rcar-gen2-can";
708 clock-names = "clkp1", "clkp2", "can_clk";
709 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
715 compatible = "renesas,can-r8a7792",
716 "renesas,rcar-gen2-can";
721 clock-names = "clkp1", "clkp2", "can_clk";
722 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
728 compatible = "renesas,vin-r8a7792",
729 "renesas,rcar-gen2-vin";
733 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
739 compatible = "renesas,vin-r8a7792",
740 "renesas,rcar-gen2-vin";
744 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
750 compatible = "renesas,vin-r8a7792",
751 "renesas,rcar-gen2-vin";
755 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
761 compatible = "renesas,vin-r8a7792",
762 "renesas,rcar-gen2-vin";
766 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
772 compatible = "renesas,vin-r8a7792",
773 "renesas,rcar-gen2-vin";
777 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
783 compatible = "renesas,vin-r8a7792",
784 "renesas,rcar-gen2-vin";
788 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
794 compatible = "renesas,sdhi-r8a7792",
795 "renesas,rcar-gen2-sdhi";
800 dma-names = "tx", "rx", "tx", "rx";
802 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
807 gic: interrupt-controller@f1001000 {
808 compatible = "arm,gic-400";
809 #interrupt-cells = <3>;
810 interrupt-controller;
818 clock-names = "clk";
819 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
828 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
837 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
846 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
850 jpu: jpeg-codec@fe980000 {
851 compatible = "renesas,jpu-r8a7792",
852 "renesas,rcar-gen2-jpu";
856 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
861 compatible = "renesas,du-r8a7792";
866 clock-names = "du.0", "du.1";
868 reset-names = "du.0";
872 #address-cells = <1>;
873 #size-cells = <0>;
894 compatible = "renesas,r8a7792-cmt0",
895 "renesas,rcar-gen2-cmt0";
900 clock-names = "fck";
901 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
908 compatible = "renesas,r8a7792-cmt1",
909 "renesas,rcar-gen2-cmt1";
920 clock-names = "fck";
921 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
929 compatible = "arm,armv7-timer";
930 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,