dts/qcom/qcom-mdm9615.dtsi

12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
102 		gcc: clock-controller@900000 {  label
103 			compatible = "qcom,gcc-mdm9615";
118 				 <&gcc PLL4_VOTE>,
134 			compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";
141 			clocks = <&gcc PRNG_CLK>;
143 			assigned-clocks = <&gcc PRNG_CLK>;
151 			clocks = <&gcc GSBI2_H_CLK>;
165 				clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
175 			clocks = <&gcc GSBI3_H_CLK>;
189 				clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>;
199 			clocks = <&gcc GSBI4_H_CLK>;
213 				clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>;
223 			clocks = <&gcc GSBI5_H_CLK>;
240 				assigned-clocks = <&gcc GSBI5_QUP_CLK>;
243 				clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
253 				clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>;
269 			clocks = <&gcc SDC1_H_CLK>;
279 			clocks = <&gcc SDC2_H_CLK>;
291 			clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
300 			assigned-clocks = <&gcc SDC1_CLK>;
310 			clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
320 			assigned-clocks = <&gcc SDC2_CLK>;