Lines Matching +full:1 +full:a400000
19 #address-cells = <1>;
20 #size-cells = <1>;
26 #address-cells = <1>;
39 interrupts = <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
59 #address-cells = <1>;
60 #size-cells = <1>;
83 interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
84 <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
85 <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
104 #clock-cells = <1>;
105 #power-domain-cells = <1>;
106 #reset-cells = <1>;
115 #clock-cells = <1>;
116 #reset-cells = <1>;
138 rng@1a500000 {
154 #address-cells = <1>;
155 #size-cells = <1>;
160 #address-cells = <1>;
178 #address-cells = <1>;
179 #size-cells = <1>;
184 #address-cells = <1>;
202 #address-cells = <1>;
203 #size-cells = <1>;
226 #address-cells = <1>;
227 #size-cells = <1>;
234 #address-cells = <1>;
271 #dma-cells = <1>;
281 #dma-cells = <1>;
298 dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
316 no-1-8-v;
318 dmas = <&sdcc2bam 2>, <&sdcc2bam 1>;
324 tcsr: syscon@1a400000 {