Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
13 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
20 interrupt-parent = <&aic>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a5";
34 reg = <0>;
35 next-level-cache = <&L2>;
40 compatible = "arm,cortex-a5-pmu";
45 compatible = "arm,coresight-etb10", "arm,primecell";
46 reg = <0x740000 0x1000>;
49 clock-names = "apb_pclk";
51 in-ports {
54 remote-endpoint = <&etm_out>;
61 compatible = "arm,coresight-etm3x", "arm,primecell";
62 reg = <0x73c000 0x1000>;
65 clock-names = "apb_pclk";
67 out-ports {
70 remote-endpoint = <&etb_in>;
78 reg = <0x20000000 0x20000000>;
83 compatible = "fixed-clock";
84 #clock-cells = <0>;
85 clock-frequency = <0>;
89 compatible = "fixed-clock";
90 #clock-cells = <0>;
91 clock-frequency = <0>;
96 compatible = "mmio-sram";
97 reg = <0x00200000 0x20000>;
98 #address-cells = <1>;
99 #size-cells = <1>;
103 resistive_touch: resistive-touch {
104 compatible = "resistive-adc-touch";
105 io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>,
108 io-channel-names = "x", "y", "pressure";
109 touchscreen-min-pressure = <50000>;
114 compatible = "simple-bus";
115 #address-cells = <1>;
116 #size-cells = <1>;
120 compatible = "mmio-sram";
121 no-memory-wc;
122 reg = <0x00100000 0x2400>;
123 #address-cells = <1>;
124 #size-cells = <1>;
130 compatible = "atmel,sama5d3-udc";
131 reg = <0x00300000 0x100000
135 clock-names = "pclk", "hclk";
140 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
141 reg = <0x00400000 0x100000>;
144 clock-names = "ohci_clk", "hclk", "uhpck";
149 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
150 reg = <0x00500000 0x100000>;
153 clock-names = "usb_clk", "ehci_clk";
157 L2: cache-controller@a00000 {
158 compatible = "arm,pl310-cache";
159 reg = <0x00a00000 0x1000>;
161 cache-unified;
162 cache-level = <2>;
166 compatible = "atmel,sama5d3-ebi";
167 #address-cells = <2>;
168 #size-cells = <1>;
170 reg = <0x10000000 0x10000000
179 nand_controller: nand-controller {
180 compatible = "atmel,sama5d3-nand-controller";
181 atmel,nfc-sram = <&nfc_sram>;
182 atmel,nfc-io = <&nfc_io>;
183 ecc-engine = <&pmecc>;
184 #address-cells = <2>;
185 #size-cells = <1>;
191 sdmmc0: sdio-host@a0000000 {
192 compatible = "atmel,sama5d2-sdhci";
193 reg = <0xa0000000 0x300>;
196 clock-names = "hclock", "multclk", "baseclk";
197 assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
198 assigned-clock-rates = <480000000>;
202 sdmmc1: sdio-host@b0000000 {
203 compatible = "atmel,sama5d2-sdhci";
204 reg = <0xb0000000 0x300>;
207 clock-names = "hclock", "multclk", "baseclk";
208 assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
209 assigned-clock-rates = <480000000>;
213 nfc_io: nfc-io@c0000000 {
214 compatible = "atmel,sama5d3-nfc-io", "syscon";
215 reg = <0xc0000000 0x8000000>;
219 compatible = "simple-bus";
220 #address-cells = <1>;
221 #size-cells = <1>;
225 compatible = "atmel,sama5d2-hlcdc";
226 reg = <0xf0000000 0x2000>;
229 clock-names = "periph_clk","sys_clk", "slow_clk";
232 hlcdc-display-controller {
233 compatible = "atmel,hlcdc-display-controller";
234 #address-cells = <1>;
235 #size-cells = <0>;
238 #address-cells = <1>;
239 #size-cells = <0>;
240 reg = <0>;
244 hlcdc_pwm: hlcdc-pwm {
245 compatible = "atmel,hlcdc-pwm";
246 #pwm-cells = <3>;
251 compatible = "atmel,sama5d2-isc";
252 reg = <0xf0008000 0x4000>;
255 clock-names = "hclock", "iscck", "gck";
256 #clock-cells = <0>;
257 clock-output-names = "isc-mck";
262 compatible = "atmel,sama5d3-ddramc";
263 reg = <0xf000c000 0x200>;
265 clock-names = "ddrck", "mpddr";
268 dma0: dma-controller@f0010000 {
269 compatible = "atmel,sama5d4-dma";
270 reg = <0xf0010000 0x1000>;
272 #dma-cells = <1>;
274 clock-names = "dma_clk";
278 dma1: dma-controller@f0004000 {
279 compatible = "atmel,sama5d4-dma";
280 reg = <0xf0004000 0x1000>;
282 #dma-cells = <1>;
284 clock-names = "dma_clk";
287 pmc: clock-controller@f0014000 {
288 compatible = "atmel,sama5d2-pmc", "syscon";
289 reg = <0xf0014000 0x160>;
291 #clock-cells = <2>;
293 clock-names = "slow_clk", "main_xtal";
297 compatible = "atmel,sama5d2-qspi";
298 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
299 reg-names = "qspi_base", "qspi_mmap";
302 clock-names = "pclk";
303 #address-cells = <1>;
304 #size-cells = <0>;
309 compatible = "atmel,sama5d2-qspi";
310 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
311 reg-names = "qspi_base", "qspi_mmap";
314 clock-names = "pclk";
315 #address-cells = <1>;
316 #size-cells = <0>;
321 compatible = "atmel,at91sam9g46-sha";
322 reg = <0xf0028000 0x100>;
327 dma-names = "tx";
329 clock-names = "sha_clk";
333 compatible = "atmel,at91sam9g46-aes";
334 reg = <0xf002c000 0x100>;
342 dma-names = "tx", "rx";
344 clock-names = "aes_clk";
348 compatible = "atmel,at91rm9200-spi";
349 reg = <0xf8000000 0x100>;
357 dma-names = "tx", "rx";
359 clock-names = "spi_clk";
360 atmel,fifo-size = <16>;
361 #address-cells = <1>;
362 #size-cells = <0>;
367 compatible = "atmel,at91sam9g45-ssc";
368 reg = <0xf8004000 0x4000>;
376 dma-names = "tx", "rx";
378 clock-names = "pclk";
383 compatible = "atmel,sama5d2-gem";
384 reg = <0xf8008000 0x1000>;
389 clock-names = "hclk", "pclk";
394 compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
395 #address-cells = <1>;
396 #size-cells = <0>;
397 reg = <0xf800c000 0x100>;
400 clock-names = "t0_clk", "gclk", "slow_clk";
404 compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
405 #address-cells = <1>;
406 #size-cells = <0>;
407 reg = <0xf8010000 0x100>;
410 clock-names = "t0_clk", "gclk", "slow_clk";
414 compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
415 reg = <0xf8014000 0x1000>;
418 #address-cells = <1>;
419 #size-cells = <1>;
422 pmecc: ecc-engine@f8014070 {
423 compatible = "atmel,sama5d2-pmecc";
424 reg = <0xf8014070 0x490>,
430 compatible = "atmel,sama5d2-pdmic";
431 reg = <0xf8018000 0x124>;
436 dma-names = "rx";
438 clock-names = "pclk", "gclk";
443 compatible = "atmel,at91sam9260-usart";
444 reg = <0xf801c000 0x100>;
445 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
453 dma-names = "tx", "rx";
455 clock-names = "usart";
460 compatible = "atmel,at91sam9260-usart";
461 reg = <0xf8020000 0x100>;
462 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
470 dma-names = "tx", "rx";
472 clock-names = "usart";
477 compatible = "atmel,at91sam9260-usart";
478 reg = <0xf8024000 0x100>;
479 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
487 dma-names = "tx", "rx";
489 clock-names = "usart";
494 compatible = "atmel,sama5d2-i2c";
495 reg = <0xf8028000 0x100>;
503 dma-names = "tx", "rx";
504 #address-cells = <1>;
505 #size-cells = <0>;
507 atmel,fifo-size = <16>;
512 compatible = "atmel,sama5d2-pwm";
513 reg = <0xf802c000 0x4000>;
515 #pwm-cells = <3>;
521 compatible = "atmel,sama5d2-sfr", "syscon";
522 reg = <0xf8030000 0x98>;
526 compatible = "atmel,sama5d2-flexcom";
527 reg = <0xf8034000 0x200>;
529 #address-cells = <1>;
530 #size-cells = <1>;
535 compatible = "atmel,at91sam9260-usart";
536 reg = <0x200 0x200>;
537 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
540 clock-names = "usart";
549 dma-names = "tx", "rx";
550 atmel,fifo-size = <32>;
555 compatible = "atmel,at91rm9200-spi";
556 reg = <0x400 0x200>;
558 #address-cells = <1>;
559 #size-cells = <0>;
561 clock-names = "spi_clk";
570 dma-names = "tx", "rx";
571 atmel,fifo-size = <16>;
576 compatible = "atmel,sama5d2-i2c";
577 reg = <0x600 0x200>;
579 #address-cells = <1>;
580 #size-cells = <0>;
590 dma-names = "tx", "rx";
591 atmel,fifo-size = <16>;
597 compatible = "atmel,sama5d2-flexcom";
598 reg = <0xf8038000 0x200>;
600 #address-cells = <1>;
601 #size-cells = <1>;
606 compatible = "atmel,at91sam9260-usart";
607 reg = <0x200 0x200>;
608 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
611 clock-names = "usart";
620 dma-names = "tx", "rx";
621 atmel,fifo-size = <32>;
626 compatible = "atmel,at91rm9200-spi";
627 reg = <0x400 0x200>;
629 #address-cells = <1>;
630 #size-cells = <0>;
632 clock-names = "spi_clk";
641 dma-names = "tx", "rx";
642 atmel,fifo-size = <16>;
647 compatible = "atmel,sama5d2-i2c";
648 reg = <0x600 0x200>;
650 #address-cells = <1>;
651 #size-cells = <0>;
661 dma-names = "tx", "rx";
662 atmel,fifo-size = <16>;
668 compatible = "atmel,sama5d2-securam", "mmio-sram";
669 reg = <0xf8044000 0x1420>;
671 #address-cells = <1>;
672 #size-cells = <1>;
673 no-memory-wc;
677 reset_controller: reset-controller@f8048000 {
678 compatible = "atmel,sama5d3-rstc";
679 reg = <0xf8048000 0x10>;
684 compatible = "atmel,sama5d2-shdwc";
685 reg = <0xf8048010 0x10>;
687 #address-cells = <1>;
688 #size-cells = <0>;
689 atmel,wakeup-rtc-timer;
693 compatible = "atmel,at91sam9260-pit";
694 reg = <0xf8048030 0x10>;
700 compatible = "atmel,sama5d4-wdt";
701 reg = <0xf8048040 0x10>;
707 clk32k: clock-controller@f8048050 {
708 compatible = "atmel,sama5d4-sckc";
709 reg = <0xf8048050 0x4>;
711 #clock-cells = <0>;
715 compatible = "atmel,sama5d2-rtc";
716 reg = <0xf80480b0 0x30>;
722 compatible = "atmel,sama5d2-i2s";
723 reg = <0xf8050000 0x100>;
731 dma-names = "tx", "rx";
733 clock-names = "pclk", "gclk";
734 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
735 assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
741 reg = <0xf8054000 0x4000>, <0x210000 0x1c00>;
742 reg-names = "m_can", "message_ram";
745 interrupt-names = "int0", "int1";
747 clock-names = "hclk", "cclk";
748 assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
749 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
750 assigned-clock-rates = <40000000>;
751 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
756 compatible = "atmel,at91rm9200-spi";
757 reg = <0xfc000000 0x100>;
765 dma-names = "tx", "rx";
767 clock-names = "spi_clk";
768 atmel,fifo-size = <16>;
769 #address-cells = <1>;
770 #size-cells = <0>;
775 compatible = "atmel,at91sam9260-usart";
776 reg = <0xfc008000 0x100>;
777 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
785 dma-names = "tx", "rx";
787 clock-names = "usart";
792 compatible = "atmel,at91sam9260-usart";
793 reg = <0xfc00c000 0x100>;
794 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
801 dma-names = "tx", "rx";
804 clock-names = "usart";
809 compatible = "atmel,sama5d2-flexcom";
810 reg = <0xfc010000 0x200>;
812 #address-cells = <1>;
813 #size-cells = <1>;
818 compatible = "atmel,at91sam9260-usart";
819 reg = <0x200 0x200>;
820 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
823 clock-names = "usart";
832 dma-names = "tx", "rx";
833 atmel,fifo-size = <32>;
838 compatible = "atmel,at91rm9200-spi";
839 reg = <0x400 0x200>;
841 #address-cells = <1>;
842 #size-cells = <0>;
844 clock-names = "spi_clk";
853 dma-names = "tx", "rx";
854 atmel,fifo-size = <16>;
859 compatible = "atmel,sama5d2-i2c";
860 reg = <0x600 0x200>;
862 #address-cells = <1>;
863 #size-cells = <0>;
873 dma-names = "tx", "rx";
874 atmel,fifo-size = <16>;
880 compatible = "atmel,sama5d2-flexcom";
881 reg = <0xfc014000 0x200>;
883 #address-cells = <1>;
884 #size-cells = <1>;
889 compatible = "atmel,at91sam9260-usart";
890 reg = <0x200 0x200>;
891 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
894 clock-names = "usart";
903 dma-names = "tx", "rx";
904 atmel,fifo-size = <32>;
909 compatible = "atmel,at91rm9200-spi";
910 reg = <0x400 0x200>;
912 #address-cells = <1>;
913 #size-cells = <0>;
915 clock-names = "spi_clk";
924 dma-names = "tx", "rx";
925 atmel,fifo-size = <16>;
930 compatible = "atmel,sama5d2-i2c";
931 reg = <0x600 0x200>;
933 #address-cells = <1>;
934 #size-cells = <0>;
944 dma-names = "tx", "rx";
945 atmel,fifo-size = <16>;
952 compatible = "atmel,sama5d2-flexcom";
953 reg = <0xfc018000 0x200>;
955 #address-cells = <1>;
956 #size-cells = <1>;
961 compatible = "atmel,at91sam9260-usart";
962 reg = <0x200 0x200>;
963 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
966 clock-names = "usart";
975 dma-names = "tx", "rx";
976 atmel,fifo-size = <32>;
981 compatible = "atmel,at91rm9200-spi";
982 reg = <0x400 0x200>;
984 #address-cells = <1>;
985 #size-cells = <0>;
987 clock-names = "spi_clk";
996 dma-names = "tx", "rx";
997 atmel,fifo-size = <16>;
1002 compatible = "atmel,sama5d2-i2c";
1003 reg = <0x600 0x200>;
1005 #address-cells = <1>;
1006 #size-cells = <0>;
1016 dma-names = "tx", "rx";
1017 atmel,fifo-size = <16>;
1023 compatible = "atmel,at91sam9g45-trng";
1024 reg = <0xfc01c000 0x100>;
1029 aic: interrupt-controller@fc020000 {
1030 #interrupt-cells = <3>;
1031 compatible = "atmel,sama5d2-aic";
1032 interrupt-controller;
1033 reg = <0xfc020000 0x200>;
1034 atmel,external-irqs = <49>;
1038 compatible = "atmel,sama5d2-i2c";
1039 reg = <0xfc028000 0x100>;
1047 dma-names = "tx", "rx";
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1051 atmel,fifo-size = <16>;
1056 compatible = "atmel,sama5d2-adc";
1057 reg = <0xfc030000 0x100>;
1060 clock-names = "adc_clk";
1062 dma-names = "rx";
1063 atmel,min-sample-rate-hz = <200000>;
1064 atmel,max-sample-rate-hz = <20000000>;
1065 atmel,startup-time-ms = <4>;
1066 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
1067 #io-channel-cells = <1>;
1072 compatible = "atmel,sama5d2-pinctrl";
1073 reg = <0xfc038000 0x600>;
1078 interrupt-controller;
1079 #interrupt-cells = <2>;
1080 gpio-controller;
1081 #gpio-cells = <2>;
1086 compatible = "atmel,sama5d2-secumod", "syscon";
1087 reg = <0xfc040000 0x100>;
1089 gpio-controller;
1090 #gpio-cells = <2>;
1094 compatible = "atmel,at91sam9g46-tdes";
1095 reg = <0xfc044000 0x100>;
1103 dma-names = "tx", "rx";
1105 clock-names = "tdes_clk";
1109 compatible = "atmel,sama5d2-classd";
1110 reg = <0xfc048000 0x100>;
1115 dma-names = "tx";
1117 clock-names = "pclk", "gclk";
1122 compatible = "atmel,sama5d2-i2s";
1123 reg = <0xfc04c000 0x100>;
1131 dma-names = "tx", "rx";
1133 clock-names = "pclk", "gclk";
1134 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
1135 assigned-clock-parents = <&pmc PMC_TYPE_GCK 55>;
1141 reg = <0xfc050000 0x4000>, <0x210000 0x3800>;
1142 reg-names = "m_can", "message_ram";
1145 interrupt-names = "int0", "int1";
1147 clock-names = "hclk", "cclk";
1148 assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
1149 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
1150 assigned-clock-rates = <40000000>;
1151 bosch,mram-cfg = <0x1c00 0 0 64 0 0 32 32>;
1156 compatible = "atmel,sama5d2-sfrbu", "syscon";
1157 reg = <0xfc05c000 0x20>;
1161 compatible = "atmel,sama5d2-chipid";
1162 reg = <0xfc069000 0x8>;