Lines Matching +full:timer +full:- +full:dsp
1 # SPDX-License-Identifier: GPL-2.0-only
3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
87 source "arch/arc/plat-tb10x/Kconfig"
88 source "arch/arc/plat-axs10x/Kconfig"
89 source "arch/arc/plat-hsdk/Kconfig"
107 ISA for the Next Generation ARC-HS cores
125 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
127 -Caches: New Prog Model, Region Flush
128 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
131 bool "ARC-HS"
136 - SMP configurations of up to 4 cores with coherency
137 - Optional L2 Cache and IO-Coherency
138 - Revised Interrupt Architecture (multiple priorites, reg banks,
140 - MMUv4 (PIPT dcache, Huge Pages)
141 - Instructions for
152 string "Override default -mcpu compiler flag"
155 Override default -mcpu=xxx compiler flag (which is set depending on
166 bool "Symmetric Multi-Processing"
174 int "Maximum number of CPUs (2-4096)"
179 bool "Enable Halt-on-reset boot mode"
181 In SMP configuration cores can be configured as Halt-on-reset
182 or they could all start at same time. For Halt-on-reset, non
194 This IP block enables SMP in ARC-HS38 cores.
195 It provides for cross-core interrupts, multi-core debug
210 This option specifies "N", with Line-len = 2 power N
227 This can be used to over-ride the global I/D Cache Enable on a
228 per-page basis (but only for pages accessed via MMU such as
230 TLB entries have a per-page Cache Enable Bit.
271 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
318 bool "Setup Timer IRQ as high Priority"
319 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
339 bool "Insn: SWAPE (endian-swap)"
356 Enable gcc to generate 64-bit load/store instructions
366 bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6 and/or DSP)"
369 Depending on the configuration, CPU can contain accumulator reg-pair
380 prompt "DSP support"
383 Depending on the configuration, CPU can contain DSP registers
389 bool "No DSP extension presence in HW"
391 No DSP extension presence in HW
394 bool "DSP extension in HW, no support for userspace"
398 DSP extension presence in HW, no support for DSP-enabled userspace
399 applications. We don't save / restore DSP registers and only do
403 bool "Support DSP for userspace apps"
408 DSP extension presence in HW, support save / restore DSP registers to
409 run DSP-enabled userspace applications
412 bool "Support DSP with AGU for userspace apps"
417 DSP and AGU extensions presence in HW, support save / restore DSP
418 and AGU registers to run DSP-enabled userspace applications
444 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
445 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
471 bool "Support for the 40-bit Physical Address Extension"
488 kernel-user gutter)
505 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
509 int "Timer Frequency"
517 Metaware Debugger. This can come in handy for Linux-host communication
544 Enable paranoid checks and self-test of both ARC-specific and generic