gpu/rfc/xe.rst

5 discrete platforms starting with Tiger Lake (first Intel Xe Architecture).
18 This is also an opportunity to start from the beginning with a clean uAPI that is
19 extensible by design and already aligned with the modern userspace needs. For
22 explicit synchronization. With persistent mapping across the execution, the
27 the display code with the i915 driver so that there is maximum reuse there.
43 platforms starting from Tiger Lake, with initial support in userspace implemented
73 Display integration with i915
75 In order to share the display code with the i915 driver so that there is maximum
77 xe.ko. Currently, the i915/display code in Xe tree is polluted with many 'ifdefs'
101 The goal is to engage with the Community to understand if the best approach is to
112 Different drivers implement different ways of dealing with execution of userptr.
113 With multiple drivers currently introducing support to VM_BIND, the goal is to
115 extent this is already getting addressed itself with the GPUVA where likely the
116 userptr will be a GPUVA with a NULL GEM call VM bind directly on the userptr.
145 Xe merged, it is mandatory to have a consensus with other drivers and Mesa.
146 It needs to be clear how to handle async VM_BIND and interactions with userspace
147 memory fences. Ideally with helper support so people don't get it wrong in all
175 contexts, with the minimal scaffolding for preempt-ctx fences (probably on the
176 drm_sched_entity) and making sure drm_scheduler can cope with the lack of job
179 The goal is to achieve a consensus ahead of Xe initial pull-request, ideally with
187 Xe needs to align with other drivers on the way that the error states are
196 Later, when we are in-tree, the goal is to collaborate with devcoredump
197 infrastructure with overall possible improvements, like multiple file support
206 engage with the community to explore the options of a common API.
222 1) Have an uAPI that aligns with modern UMD needs.
228 this aligns very well with our goals and with our VM_BIND. The engagement with
231 As a key measurable result, Xe needs to be aligned with the GPU VA and working in
234 maintainers to go along with the first Xe pull request towards drm-next.