driver-api/gpio/legacy.rst

2 Legacy GPIO Interfaces
5 This provides an overview of GPIO access conventions on Linux.
11 What is a GPIO?
13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
15 to Linux developers working with embedded and custom hardware.  Each GPIO
16 represents a bit connected to a particular pin, or "ball" on Ball Grid Array
21 System-on-Chip (SOC) processors heavily rely on GPIOs.  In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
25 often have a few such pins to help with pin scarcity on SOCs; and there are
26 also "GPIO Expander" chips that connect using the I2C or SPI serial busses.
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32   - Output values are writable (high=1, low=0).  Some chips also have
34     value might be driven ... supporting "wire-OR" and similar schemes
37   - Input values are likewise readable (1, 0).  Some chips support readback
38     of pins configured as "output", which is very useful in such "wire-OR"
39     cases (to support bidirectional signaling).  GPIO controllers may have
40     input de-glitch/debounce logic, sometimes with software controls.
42   - Inputs can often be used as IRQ signals, often edge triggered but
44     wakeup events, to wake the system from a low power state.
46   - Usually a GPIO will be configurable as either input or output, as needed
49   - Most GPIOs can be accessed while holding spinlocks, but those accessed
50     through a serial bus normally can't.  Some systems support both types.
52 On a given board each GPIO is used for one specific purpose like monitoring
54 a LED, configuring a transceiver, bitbanging a serial bus, poking a hardware
55 watchdog, sensing a switch, and so on.
58 GPIO conventions
60 Note that this is called a "convention" because you don't need to do it this
62 is not the main issue; GPIOs are often used for the kind of board-specific
64 used on a board that's wired differently.  Only least-common-denominator
65 functionality can be very portable.  Other features are platform-specific,
71 used for several very different kinds of GPIO controller.  (There is some
73 in this document, but drivers acting as clients to the GPIO interface must
77 use it when possible.  Platforms must select GPIOLIB if GPIO functionality
79 standard GPIO calls should have Kconfig entries which depend on GPIOLIB.  The
80 GPIO calls are available, either as "real code" or as optimized-away stubs,
83 	#include <linux/gpio.h>
93 -----------------
100 for the GPIO lines so that board-specific setup code directly corresponds
101 to the relevant schematics.  In contrast, drivers should only use GPIO
103 board-specific pin configuration data (along with other board specific
106 So for example one platform uses numbers 32-159 for GPIOs; while another
107 uses numbers 0..63 with one set of GPIO controllers, 64-79 with another
108 type of GPIO controller, and on one particular board 80-95 with an FPGA.
110 use numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders.
112 If you want to initialize a structure with an invalid GPIO number, use
113 some negative number (perhaps "-EINVAL"); that will never be valid.  To
114 test if such number from such a structure could reference a GPIO, you
119 A number that's not valid will be rejected by calls which may request
121 example, a number might be valid but temporarily unused on a given board.
123 Whether a platform supports multiple GPIO controllers is a platform-specific
125 of GPIO numbers, and whether new controllers can be added at runtime.  Such issues
126 can affect things including whether adjacent GPIO numbers are both valid.
129 -----------
130 The first thing a system should do with a GPIO is allocate it, using
133 One of the next things to do with a GPIO, often in board setup code when
134 setting up a platform_device using the GPIO, is mark its direction::
137 	int gpio_direction_input(unsigned gpio);
138 	int gpio_direction_output(unsigned gpio, int value);
140 The return value is zero for success, else a negative errno.  It should
143 a task context.  However, for spinlock-safe GPIOs it's OK to use them
150 of a GPIO implicitly requests that GPIO (see below) if it has not been
154 Setting the direction can fail if the GPIO number is invalid, or when
155 that particular GPIO can't be used in that mode.  It's generally a bad
158 that board setup code probably needs to multiplex that pin as a GPIO,
162 Spinlock-Safe GPIO access
163 -------------------------
164 Most GPIO controllers can be accessed with memory read/write instructions.
170 	/* GPIO INPUT:  return zero or nonzero */
171 	int gpio_get_value(unsigned gpio);
173 	/* GPIO OUTPUT */
174 	void gpio_set_value(unsigned gpio, int value);
179 issues including open-drain signaling and output latencies.
181 The get/set calls have no error returns because "invalid GPIO" should have
187 Platform-specific implementations are encouraged to optimize the two
188 calls to access the GPIO value in cases where the GPIO number (and for
189 output, value) are constant.  It's normal for them to need only a couple
190 of instructions in such cases (reading or writing a hardware register),
192 applications a lot more efficient (in both space and time) than spending
196 GPIO access that may sleep
197 --------------------------
198 Some GPIO controllers must be accessed using message based busses like I2C
199 or SPI.  Commands to read or write those GPIO values require waiting to
200 get to the head of a queue to transmit a command and get its response.
202 To access such GPIOs, a different set of accessors is defined::
204 	/* GPIO INPUT:  return zero or nonzero, might sleep */
205 	int gpio_get_value_cansleep(unsigned gpio);
207 	/* GPIO OUTPUT, might sleep */
208 	void gpio_set_value_cansleep(unsigned gpio, int value);
210 Accessing such GPIOs requires a context which may sleep,  for example
211 a threaded IRQ handler, and those accessors must be used instead of
212 spinlock-safe accessors without the cansleep() name suffix.
216 the same as the spinlock-safe calls.
219 from contexts which may sleep, since they may need to access the GPIO
235 ----------------------------
238 	/* request GPIO, returning 0 or negative errno.
239 	 * non-null labels may be useful for diagnostics.
241 	int gpio_request(unsigned gpio, const char *label);
243 	/* release previously-claimed GPIO */
244 	void gpio_free(unsigned gpio);
246 Passing invalid GPIO numbers to gpio_request() will fail, as will requesting
249 a task context.  However, for spinlock-safe GPIOs it's OK to request GPIOs
254 several hundred potential GPIOs, but often only a dozen are used on any
256 (a) two or more drivers wrongly think they have exclusive use of that
258 needed to manage a signal that's in active use.  That is, requesting a
259 GPIO can serve as a kind of lock.
266 be informed of their use; a gpiolib driver's .request() operation may call
267 pinctrl_gpio_request(), and a gpiolib driver's .free() operation may call
268 pinctrl_gpio_free(). The pinctrl subsystem allows a pinctrl_gpio_request()
269 to succeed concurrently with a pin or pingroup being "owned" by a device for
273 GPIO signal to the appropriate pin should occur within a GPIO driver's
275 setup of an output GPIO's value. This allows a glitch-free migration from a
276 pin's special function to GPIO. This is sometimes required when using a GPIO
277 to implement a workaround on signals typically driven by a non-GPIO HW block.
279 Some platforms allow some or all GPIO signals to be routed to different pins.
280 Similarly, other aspects of the GPIO or pin may need to be configured, such as
283 the pinctrl subsystem's mapping table, so that GPIO users need not be aware
286 Also note that it's your responsibility to have stopped using a GPIO
292 	/* request a single GPIO, with initial configuration specified by
296 	int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
298 	/* request multiple GPIOs in a single call
300 	int gpio_request_array(struct gpio *array, size_t num);
302 	/* release multiple GPIOs in a single call
304 	void gpio_free_array(struct gpio *array, size_t num);
308 	* GPIOF_DIR_IN		- to configure direction as input
309 	* GPIOF_DIR_OUT		- to configure direction as output
311 	* GPIOF_INIT_LOW	- as output, set initial level to LOW
312 	* GPIOF_INIT_HIGH	- as output, set initial level to HIGH
317 	* GPIOF_IN		- configure as input
318 	* GPIOF_OUT_INIT_LOW	- configured as output, initial level LOW
319 	* GPIOF_OUT_INIT_HIGH	- configured as output, initial level HIGH
321 Further more, to ease the claim/release of multiple GPIOs, 'struct gpio' is
324 	struct gpio {
325 		unsigned	gpio;
330 A typical example of usage::
332 	static struct gpio leds_gpios[] = {
352 --------------------
353 GPIO numbers are unsigned integers; so are IRQ numbers.  These make up
354 two logically distinct namespaces (GPIO 0 need not use IRQ 0).  You can
357 	/* map GPIO numbers to IRQ numbers */
358 	int gpio_to_irq(unsigned gpio);
361 else a negative errno code if the mapping can't be done.  (For example,
362 some GPIOs can't be used as IRQs.)  It is an unchecked error to use a GPIO
366 These two mapping calls are expected to cost on the order of a single
369 Non-error values returned from gpio_to_irq() can be passed to request_irq()
371 devices, by the board-specific initialization code.  Note that IRQ trigger
377 ----------------------------
380 "open collector" is used for TTL.)  A pullup resistor causes the high signal
381 level.  This is sometimes called a "wire-AND"; or more practically, from the
382 negative logic (low=true) perspective this is a "wire-OR".
384 One common example of an open drain signal is a shared active-low IRQ line.
387 Some GPIO controllers directly support open drain outputs; many don't.  When
389 there's a common idiom you can use to emulate it with any GPIO pin that can
392  LOW:	gpio_direction_output(gpio, 0) ... this drives the signal
395  HIGH:	gpio_direction_input(gpio) ... this turns off the output,
398 If you are "driving" the signal high but gpio_get_value(gpio) reports a low
401 common example, that's how I2C clocks are stretched:  a slave that needs a
406 GPIO controllers and the pinctrl subsystem
407 ------------------------------------------
409 A GPIO controller on a SOC might be tightly coupled with the pinctrl
411 together with an optional gpio feature. We have already covered the
412 case where e.g. a GPIO controller need to reserve a pin or set the
413 direction of a pin by calling any of::
420 But how does the pin control subsystem cross-correlate the GPIO
421 numbers (which are a global business) to a certain pin on a certain
425 cross-reference tables. These are described in
426 Documentation/driver-api/pin-control.rst
429 gpio (under gpiolib) is still maintained by gpio drivers. It may happen
430 that different pin ranges in a SoC is managed by different gpio drivers.
432 This makes it logical to let gpio drivers announce their pin ranges to
435 before any gpio usage.
437 For this, the gpio controller can register its pin range with pinctrl
440 For with DT support refer to Documentation/devicetree/bindings/gpio/gpio.txt.
442 For non-DT support, user can call gpiochip_add_pin_range() with appropriate
443 parameters to register a range of gpio pins with a pinctrl driver. For this
451 this is highly chip-specific and nonportable.  One platform might not need
454 to route a given GPIO to any one of several pins.  (Yes, those examples all
460 pullups (or pulldowns) so that the on-chip ones should not be used.
461 (When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.)
462 Likewise drive strength (2 mA vs 20 mA) and voltage (1.8V vs 3.3V) is a
463 platform-specific issue, as are models like (not) having a one-to-one
466 There are other system-specific mechanisms that are not specified here,
467 like the aforementioned options for input de-glitching and wire-OR output.
470 commonly grouped in banks of 16 or 32, with a given SOC having several such
476 a side effect of configuring an add-on board with some GPIO expanders.
479 GPIO implementor's framework (OPTIONAL)
482 easier for platforms to support different kinds of GPIO controller using
485 As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file
491 -----------------------------
492 In this framework each GPIO controller is packaged as a "struct gpio_chip"
495  - methods to establish GPIO direction
496  - methods used to access GPIO values
497  - flag saying whether calls to its methods may sleep
498  - optional debugfs dump method (showing extra state like pullup config)
499  - label for diagnostics
501 There is also per-instance data, which may come from device.platform_data:
502 the number of its first GPIO, and how many GPIOs it exposes.
504 The code implementing a gpio_chip should support multiple instances of the
506 gpio_chip and issue gpiochip_add().  Removing a GPIO controller should be
509 Most often a gpio_chip is part of an instance-specific structure with state
510 not exposed by the GPIO interfaces, such as addressing, power management,
511 and more.  Chips such as codecs will have complex non-GPIO state.
515 either NULL or the label associated with that GPIO when it was requested.
519 ----------------
520 To force-enable this framework, a platform's Kconfig will "select" GPIOLIB,
521 else it is up to the user to configure support for GPIO.
524 GPIOs through GPIO-lib and the code cannot be enabled by the user.
533 logic optimizing access to specific SOC-based GPIOs.  For example, if the
534 referenced GPIO is the constant "12", getting or setting its value could
537 code, costing at least a few dozen instructions.  For bitbanged I/O, such
540 For SOCs, platform-specific code defines and registers gpio_chip instances
541 for each bank of on-chip GPIOs.  Those GPIOs should be numbered/labeled to
543 may well start at zero and go up to a platform-specific limit.  Such GPIOs
549 -------------
550 For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi
551 function devices, FPGAs or CPLDs -- most often board-specific code handles
552 registering controller devices and ensures that their drivers know what GPIO
554 platform-specific GPIOs.
557 of GPIOs that chip will expose, and passes them to each GPIO expander chip
561 Initialization order can be important.  For example, when a device relies on
562 an I2C-based GPIO, its probe() routine should only be called after that GPIO
564 calls for that GPIO can work.  One way to address such dependencies is for
568 the GPIO controller device becomes unavailable.
574 configure a sysfs user interface to GPIOs.  This is different from the
575 debugfs interface, since it provides control over GPIO direction and
576 value instead of just showing a gpio state summary.  Plus, it could be
580 know for example that GPIO #23 controls the write protect line used to
582 may need to temporarily remove that protection, first importing a GPIO,
583 then changing its output state, then updating the code before re-enabling
584 the write protection.  In normal use, GPIO #23 would never be touched,
588 userspace GPIO can be used to determine system configuration data that
590 GPIO drivers could be all that the system really needs.
593 GPIO tasks:  "leds-gpio" and "gpio_keys", respectively.  Use those
599 --------------
600 There are three kinds of entry in /sys/class/gpio:
602    -	Control interfaces used to get userspace control over GPIOs;
604    -	GPIOs themselves; and
606    -	GPIO controllers ("gpio_chip" instances).
610 The control interfaces are write-only:
612     /sys/class/gpio/
615 		a GPIO to userspace by writing its number to this file.
617 		Example:  "echo 19 > export" will create a "gpio19" node
618 		for GPIO #19, if that's not requested by kernel code.
622 		Example:  "echo 19 > unexport" will remove a "gpio19"
625 GPIO signals have paths like /sys/class/gpio/gpio42/ (for GPIO #42)
628     /sys/class/gpio/gpioN/
634 		configure the GPIO as an output with that initial value.
637 		doesn't support changing the direction of a GPIO, or
639 		allow userspace to reconfigure this GPIO's direction.
641 	"value" ... reads as either 0 (low) or 1 (high).  If the GPIO
645 		If the pin can be configured as interrupt-generating interrupt
652 		new value or close the file and re-open it to read the value.
668 GPIO controllers have paths like /sys/class/gpio/gpiochip42/ (for the
670 read-only attributes:
672     /sys/class/gpio/gpiochipN/
674     	"base" ... same as N, the first GPIO managed by this chip
678     	"ngpio" ... how many GPIOs this manges (N to N + ngpio - 1)
682 a daughtercard might be different depending on the base board being used,
685 the correct GPIO number to use for a given signal.
691 The functions listed in this section are deprecated. The GPIO descriptor based
694 .. kernel-doc:: drivers/gpio/gpiolib-legacy.c