bindings/usb/snps%2Cdwc3.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Felipe Balbi <balbi@kernel.org>
14   be presented as a standalone DT node with an optional vendor-specific
18   - $ref: usb-drd.yaml#
19   - if:
25         - dr_mode
29       $ref: usb-xhci.yaml#
35         - const: snps,dwc3
36         - const: synopsys,dwc3
49   interrupt-names:
53       - const: dwc_usb3
54       - items:
65   clock-names:
68         - enum: [bus_early, ref, suspend]
69         - true
71   dma-coherent: true
80   usb-phy:
83       - description: USB2/HS PHY
84       - description: USB3/SS PHY
90   phy-names:
95         - usb2-phy
96         - usb3-phy
98   power-domains:
100       The DWC3 has 2 power-domains. The power management unit (PMU) and
105       - description: Core
106       - description: Power management unit
111   snps,usb2-lpm-disable:
120   snps,usb2-gadget-lpm-disable:
125   snps,dis-start-transfer-quirk:
127       When set, disable isoc START TRANSFER command failure SW work-around
128       for DWC_usb31 version 1.70a-ea06 and prior.
137   snps,has-lpm-erratum:
141   snps,lpm-nyet-threshold:
179     description: When set core will set Tx de-emphasis value
188       - 0 # -6dB de-emphasis
189       - 1 # -3.5dB de-emphasis
190       - 2 # No de-emphasis
206   snps,dis-u1-entry-quirk:
210   snps,dis-u2-entry-quirk:
219   snps,dis-u2-freeclk-exists-quirk:
222       PHY doesn't provide a free-running PHY clock.
225   snps,dis-del-phy-power-chg-quirk:
230   snps,dis-tx-ipgap-linecheck-quirk:
234   snps,parkmode-disable-ss-quirk:
239   snps,parkmode-disable-hs-quirk:
250   snps,dis-split-quirk:
253       avoid -EPROTO errors with usbhid on some devices (Hikey 970).
256   snps,gfladj-refclk-lpm-sel-quirk:
261   snps,resume-hs-terminations:
268   snps,ulpi-ext-vbus-drv:
276   snps,is-utmi-l1-suspend:
282   snps,hird-threshold:
288       High-Speed PHY interface selection between UTMI+ and ULPI when the
293   snps,quirk-frame-length-adjustment:
295       Value for GFLADJ_30MHZ field of GFLADJ register for post-silicon frame
302   snps,ref-clock-period-ns:
313   snps,rx-thr-num-pkt:
317       start the corresponding USB RX transaction (burst).
320       flow-controlled endpoint. It is only used for SuperSpeed.
327   snps,rx-max-burst:
329       Max USB RX burst size. In host mode, this field specifies the
330       Maximum Bulk IN burst the DWC_usb3 core can perform. When the system
331       bus is slower than the USB, RX FIFO can overrun during a long burst.
332       You can program a smaller value to this field to limit the RX burst
333       size that the core can perform. It only applies to SS Bulk,
343   snps,tx-thr-num-pkt:
347       transmission for the corresponding USB transaction (burst).
356   snps,tx-max-burst:
358       Max USB TX burst size. When the system bus is slower than the USB,
359       TX FIFO can underrun during a long burst. Program a smaller value
360       to this field to limit the TX burst size that the core can execute.
369   snps,rx-thr-num-pkt-prd:
372       snps,rx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
378   snps,rx-max-burst-prd:
380       Max periodic ESS RX burst size (host mode only). Set this and
381       snps,rx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
387   snps,tx-thr-num-pkt-prd:
390       snps,tx-max-burst-prd to a valid, non-zero value 1-16 (DWC_usb31
396   snps,tx-max-burst-prd:
398       Max periodic ESS TX burst size (host mode only). Set this and
399       snps,tx-thr-num-pkt-prd to a valid, non-zero value 1-16 (DWC_usb31
405   tx-fifo-resize:
413   tx-fifo-max-num:
414     description: Specifies the max number of packets the txfifo resizing logic
421   snps,incr-burst-type-adjustment:
423       Value for INCR burst type of GSBUSCFG0 register, undefined length INCR
424       burst type enable and INCRx type. A single value means INCRX burst mode
425       enabled. If more than one value specified, undefined length INCR burst
426       type will be enabled with burst lengths utilized up to the maximum
428     $ref: /schemas/types.yaml#/definitions/uint32-array
435   num-hc-interrupters:
442       This port is used with the 'usb-role-switch' property  to connect the
449       controller using the OF graph bindings specified if the "usb-role-switch"
461   wakeup-source:
469   - compatible
470   - reg
471   - interrupts
474   - |
479       usb-phy = <&usb2_phy>, <&usb3_phy>;
480       snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
482   - |
488       clock-names = "bus_early", "ref", "suspend";
490       phy-names = "usb2-phy", "usb3-phy";