soc/imx/fsl%2Cimx8mq-vpu-blk-ctrl.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MQ VPU blk-ctrl
10   - Lucas Stach <l.stach@pengutronix.de>
13   The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
14   the NoC and ensuring proper power sequencing of the VPU peripherals
15   located in the VPU domain of the SoC.
20       - const: fsl,imx8mq-vpu-blk-ctrl
25   '#power-domain-cells':
28   power-domains:
32   power-domain-names:
34       - const: bus
35       - const: g1
36       - const: g2
42   clock-names:
44       - const: g1
45       - const: g2
48   - compatible
49   - reg
50   - power-domains
51   - power-domain-names
52   - clocks
53   - clock-names
58   - |
59     #include <dt-bindings/clock/imx8mq-clock.h>
60     #include <dt-bindings/power/imx8mq-power.h>
62     blk-ctrl@38320000 {
63       compatible = "fsl,imx8mq-vpu-blk-ctrl";
65       power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
66       power-domain-names = "bus", "g1", "g2";
69       clock-names = "g1", "g2";
70       #power-domain-cells = <1>;