bindings/pci/rcar-gen4-pci-host.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Renesas Electronics Corp.
4 ---
5 $id: http://devicetree.org/schemas/pci/rcar-gen4-pci-host.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Gen4 PCIe Host
11   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
14   - $ref: snps,dw-pcie.yaml#
19       - const: renesas,r8a779f0-pcie   # R-Car S4-8
20       - const: renesas,rcar-gen4-pcie  # R-Car Gen4
25   reg-names:
27       - const: dbi
28       - const: dbi2
29       - const: atu
30       - const: dma
31       - const: app
32       - const: phy
33       - const: config
38   interrupt-names:
40       - const: msi
41       - const: dma
42       - const: sft_ce
43       - const: app
48   clock-names:
50       - const: core
51       - const: ref
53   power-domains:
59   reset-names:
61       - const: pwr
63   max-link-speed:
66   num-lanes:
70   - compatible
71   - reg
72   - reg-names
73   - interrupts
74   - interrupt-names
75   - clocks
76   - clock-names
77   - power-domains
78   - resets
79   - reset-names
84   - |
85     #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
86     #include <dt-bindings/interrupt-controller/arm-gic.h>
87     #include <dt-bindings/power/r8a779f0-sysc.h>
90         #address-cells = <2>;
91         #size-cells = <2>;
94             compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie";
99             reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config";
104             interrupt-names = "msi", "dma", "sft_ce", "app";
106             clock-names = "core", "ref";
107             power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
109             reset-names = "pwr";
110             max-link-speed = <4>;
111             num-lanes = <2>;
112             #address-cells = <3>;
113             #size-cells = <2>;
114             bus-range = <0x00 0xff>;
118             dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
119             #interrupt-cells = <1>;
120             interrupt-map-mask = <0 0 0 7>;
121             interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
125             snps,enable-cdm-check;