Lines Matching +full:processor +full:- +full:a +full:- +full:side

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
16 for one processor to signal the other processor using interrupts.
19 different clocks (from each side of the different peripheral buses).
20 Therefore, the MU must synchronize the accesses from one side to the
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
30 - const: fsl,imx8-mu-scu
31 - const: fsl,imx8-mu-seco
32 - const: fsl,imx93-mu-s4
33 - const: fsl,imx8ulp-mu-s4
34 - items:
35 - const: fsl,imx93-mu
36 - const: fsl,imx8ulp-mu
37 - items:
38 - enum:
39 - fsl,imx7s-mu
40 - fsl,imx8mq-mu
41 - fsl,imx8mm-mu
42 - fsl,imx8mn-mu
43 - fsl,imx8mp-mu
44 - fsl,imx8qm-mu
45 - fsl,imx8qxp-mu
46 - const: fsl,imx6sx-mu
47 - description: To communicate with i.MX8 SCU with fast IPC
49 - const: fsl,imx8-mu-scu
50 - enum:
51 - fsl,imx8qm-mu
52 - fsl,imx8qxp-mu
53 - const: fsl,imx6sx-mu
62 interrupt-names:
65 - const: tx
66 - const: rx
68 "#mbox-cells":
77 A total of 21 channels. Following types are
79 0 - TX channel with 32bit transmit register and IRQ transmit
81 1 - RX channel with 32bit receive register and IRQ support
82 2 - TX doorbell channel. Without own register and no ACK support.
83 3 - RX doorbell channel.
84 4 - RST channel
85 5 - Tx doorbell channel. With S/W ACK from the other side.
91 fsl,mu-side-b:
92 description: boolean, if present, means it is for side B MU.
95 power-domains:
99 - compatible
100 - reg
101 - interrupts
102 - "#mbox-cells"
105 - if:
109 - fsl,imx93-mu-s4
112 interrupt-names:
123 - interrupt-names
128 - |
129 #include <dt-bindings/interrupt-controller/arm-gic.h>
132 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
135 #mbox-cells = <2>;