Lines Matching +full:scm +full:- +full:msm8916
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Konrad Dybcio <konrad.dybcio@linaro.org>
13 Qualcomm "B" family devices which are not compatible with arm-smmu have
16 to non-secure vs secure interrupt line.
21 - items:
22 - enum:
23 - qcom,msm8916-iommu
24 - qcom,msm8953-iommu
25 - const: qcom,msm-iommu-v1
26 - items:
27 - enum:
28 - qcom,msm8976-iommu
29 - const: qcom,msm-iommu-v2
33 - description: Clock required for IOMMU register group access
34 - description: Clock required for underlying bus access
36 clock-names:
38 - const: iface
39 - const: bus
41 power-domains:
49 qcom,iommu-secure-id:
52 The SCM secure ID of the IOMMU instance.
54 '#address-cells':
57 '#size-cells':
60 '#iommu-cells':
64 "^iommu-ctx@[0-9a-f]+$":
70 - qcom,msm-iommu-v1-ns
71 - qcom,msm-iommu-v1-sec
72 - qcom,msm-iommu-v2-ns
73 - qcom,msm-iommu-v2-sec
81 qcom,ctx-asid:
87 - compatible
88 - interrupts
89 - reg
92 - compatible
93 - clocks
94 - clock-names
95 - ranges
96 - '#address-cells'
97 - '#size-cells'
98 - '#iommu-cells'
103 - |
104 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
108 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
112 clock-names = "iface", "bus";
113 qcom,iommu-secure-id = <17>;
114 #address-cells = <1>;
115 #size-cells = <1>;
116 #iommu-cells = <1>;
120 iommu-ctx@4000 {
121 compatible = "qcom,msm-iommu-v1-ns";