bindings/clock/qcom%2Csm8450-gpucc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM8450
10   - Konrad Dybcio <konrad.dybcio@linaro.org>
17     include/dt-bindings/clock/qcom,sm8450-gpucc.h
18     include/dt-bindings/clock/qcom,sm8550-gpucc.h
19     include/dt-bindings/reset/qcom,sm8450-gpucc.h
20     include/dt-bindings/reset/qcom,sm8650-gpucc.h
25       - qcom,sm8450-gpucc
26       - qcom,sm8550-gpucc
27       - qcom,sm8650-gpucc
31       - description: Board XO source
32       - description: GPLL0 main branch source
33       - description: GPLL0 div branch source
35   '#clock-cells':
38   '#reset-cells':
41   '#power-domain-cells':
48   - compatible
49   - reg
50   - clocks
51   - '#clock-cells'
52   - '#reset-cells'
53   - '#power-domain-cells'
58   - |
59     #include <dt-bindings/clock/qcom,gcc-sm8450.h>
60     #include <dt-bindings/clock/qcom,rpmh.h>
63         #address-cells = <2>;
64         #size-cells = <2>;
66         clock-controller@3d90000 {
67             compatible = "qcom,sm8450-gpucc";
72             #clock-cells = <1>;
73             #reset-cells = <1>;
74             #power-domain-cells = <1>;