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8 Some platforms may have multiple types of memory attached to a compute
9 node. These disparate memory ranges may share some characteristics, such
10 as CPU cache coherence, but may have different performance. For example,
15 characteristics.  Some memory may share the same node as a CPU, and others
17 CPUs, they may still be local to one or more compute nodes relative to
35 When multiple memory initiators exist, they may not all have the same
37 pair may be organized into different ranked access classes to represent
40 the highest access class, 0. Any given target may have one or more
41 local initiators, and any given initiator may have multiple local
54 A memory initiator may have multiple memory targets in the same access
68 Applications may wish to consider which node they want their memory to
102 System memory may be constructed in a hierarchy of elements with various
128 to use the system. Software may optionally query the memory cache