Lines Matching +full:de +full:- +full:active

1 .. SPDX-License-Identifier: GPL-2.0
11 There are two types of parameters - global / PCI card related, found under
22 | 0 - No module present
23 | 1 - FPDL3
24 | 2 - GMSL
32 | 1 - FPDL3
33 | 2 - GMSL
41 PRODUCT-REVISION-SERIES-SERIAL
55 | 0 - single
56 | 1 - dual (default)
61 | 0 - OLDI/JEIDA
62 | 1 - SPWG/VESA (default)
67 an active video stream.
72 | 0 - unlocked
73 | 1 - locked
77 pixel clock is running and the DE signal is moving.
82 | 0 - not detected
83 | 1 - detected
103 | 0 - active low
104 | 1 - active high
105 | 2 - not available
113 | 0 - active low
114 | 1 - active high
115 | 2 - not available
155 valid pixel in the video line (marked by DE=1).
162 line (marked by DE=1) and assertion of the HSYNC signal.
169 line with the first valid pixel (marked by DE=1).
176 by DE=1) and assertion of the VSYNC signal.
187 | 0 - PLL < 50MHz (default)
188 | 1 - PLL >= 50MHz
206 | 0 - input 0
207 | 1 - input 1
208 | 2 - v4l2 output 0
209 | 3 - v4l2 output 1
237 | 0 - active low (default)
238 | 1 - active high
243 | 0 - active low (default)
244 | 1 - active high
247 DE signal polarity.
249 | 0 - active low
250 | 1 - active high (default)
253 Output pixel clock frequency. Allowed values are between 25000-190000(kHz)
254 and there is a non-linear stepping between two consecutive allowed
270 valid pixel in the video line (marked by DE=1). The default value is 32.
274 line (marked by DE=1) and assertion of the HSYNC signal. The default value
279 line with the first valid pixel (marked by DE=1). The default value is 2.
283 by DE=1) and assertion of the VSYNC signal. The default value is 2.
292 | 0 - auto (default)
293 | 1 - single
294 | 2 - dual
302 | 0 - auto (default)
303 | 1 - single
304 | 2 - dual
312 | 0 - 12Gb/s (default)
313 | 1 - 6Gb/s
314 | 2 - 3Gb/s
315 | 3 - 1.5Gb/s
318 The GMSL multi-stream contains up to four video streams. This parameter
320 zero-based index of the stream. The default stream id is 0.
328 | 0 - disabled
329 | 1 - enabled (default)
337 - mgb4-fw.X - FPGA firmware.
338 - mgb4-data.X - Factory settings, e.g. card serial number.
340 The *mgb4-fw* partition is writable and is used for FW updates, *mgb4-data* is
341 read-only. The *X* attached to the partition name represents the card number.
343 also have a third partition named *mgb4-flash* available in the system. This
357 | bit 1 - trigger 1 pending
358 | bit 2 - trigger 2 pending
359 | bit 5 - trigger 1 level
360 | bit 6 - trigger 2 level
374 buffer mode - the values do not represent valid data in such case.*