Lines Matching +full:v +full:- +full:bit

1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2017-2018, Arm Ltd.
16 #define ARM_SPE_NEED_MORE_BYTES -1
17 #define ARM_SPE_BAD_PACKET -2
73 #define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0)) argument
74 #define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48) argument
76 #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) argument
77 #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) argument
78 #define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62) argument
79 #define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56) argument
119 #define SPE_OP_PKT_IS_OTHER_SVE_OP(v) (((v) & (BIT(7) | BIT(3) | BIT(0))) == 0x8) argument
121 #define SPE_OP_PKT_LDST_SUBCLASS_GET(v) ((v) & GENMASK_ULL(7, 1)) argument
130 #define SPE_OP_PKT_IS_LDST_ATOMIC(v) (((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2) argument
132 #define SPE_OP_PKT_AR BIT(4)
133 #define SPE_OP_PKT_EXCL BIT(3)
134 #define SPE_OP_PKT_AT BIT(2)
135 #define SPE_OP_PKT_ST BIT(0)
137 #define SPE_OP_PKT_IS_LDST_SVE(v) (((v) & (BIT(3) | BIT(1))) == 0x8) argument
139 #define SPE_OP_PKT_SVE_SG BIT(7)
147 #define SPE_OP_PKG_SVE_EVL(v) (32 << (((v) & GENMASK_ULL(6, 4)) >> 4)) argument
148 #define SPE_OP_PKT_SVE_PRED BIT(2)
149 #define SPE_OP_PKT_SVE_FP BIT(1)
152 #define SPE_OP_PKT_CR_BL(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 1) argument
153 #define SPE_OP_PKT_CR_RET(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 2) argument
154 #define SPE_OP_PKT_CR_NON_BL_RET(v) (FIELD_GET(SPE_OP_PKT_CR_MASK, (v)) == 3) argument
155 #define SPE_OP_PKT_GCS BIT(2)
156 #define SPE_OP_PKT_INDIRECT_BRANCH BIT(1)
157 #define SPE_OP_PKT_COND BIT(0)