Lines Matching +full:envelope +full:- +full:detector
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
19 #include <linux/dma/imx-dma.h>
138 .fifo_offset = -4,
142 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
143 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
144 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
145 { .compatible = "fsl,imx943-micfil", .data = &fsl_micfil_imx943 },
169 switch (micfil->quality) { in micfil_set_quality()
189 return -EINVAL; in micfil_set_quality()
192 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
203 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
214 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
225 "Envelope mode", "Energy mode",
230 "Cut-off @1750Hz",
231 "Cut-off @215Hz",
232 "Cut-off @102Hz",
238 * Cut-off @21Hz 0 0
239 * Cut-off @83Hz 0 1
240 * Cut-off @152HZ 1 0
243 "Cut-off @21Hz", "Cut-off @83Hz",
244 "Cut-off @152Hz", "Bypass",
264 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in micfil_put_dc_remover_state()
267 unsigned int *item = ucontrol->value.enumerated.item; in micfil_put_dc_remover_state()
273 return -EINVAL; in micfil_put_dc_remover_state()
275 micfil->dc_remover = val; in micfil_put_dc_remover_state()
296 ucontrol->value.enumerated.item[0] = micfil->dc_remover; in micfil_get_dc_remover_state()
305 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_enable()
306 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_enable()
310 micfil->vad_enabled = val; in hwvad_put_enable()
321 ucontrol->value.enumerated.item[0] = micfil->vad_enabled; in hwvad_get_enable()
330 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_init_mode()
331 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_init_mode()
335 /* 0 - Envelope-based Mode in hwvad_put_init_mode()
336 * 1 - Energy-based Mode in hwvad_put_init_mode()
338 micfil->vad_init_mode = val; in hwvad_put_init_mode()
349 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; in hwvad_get_init_mode()
360 ucontrol->value.enumerated.item[0] = micfil->vad_detected; in hwvad_detected()
411 SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum),
420 SOC_SINGLE_RANGE("HWVAD Detector Frame Time", REG_MICFIL_VAD0_CTRL2, 16, 0, 63, 0),
421 SOC_SINGLE("HWVAD Detector Initialization Time", REG_MICFIL_VAD0_CTRL1, 8, 31, 0),
436 if (!micfil->soc->use_verid) in fsl_micfil_use_verid()
439 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val); in fsl_micfil_use_verid()
445 micfil->verid.version = val & in fsl_micfil_use_verid()
447 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT; in fsl_micfil_use_verid()
448 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK; in fsl_micfil_use_verid()
450 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val); in fsl_micfil_use_verid()
456 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >> in fsl_micfil_use_verid()
458 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD; in fsl_micfil_use_verid()
459 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE; in fsl_micfil_use_verid()
460 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD; in fsl_micfil_use_verid()
461 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS; in fsl_micfil_use_verid()
462 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS; in fsl_micfil_use_verid()
463 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER; in fsl_micfil_use_verid()
464 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH; in fsl_micfil_use_verid()
465 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >> in fsl_micfil_use_verid()
467 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >> in fsl_micfil_use_verid()
473 /* The SRES is a self-negated bit which provides the CPU with the
475 * slave-bus interface. This bit always reads as zero, and this
483 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
488 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
494 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
495 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
499 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
508 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
521 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
522 return -EINVAL; in fsl_micfil_startup()
525 if (micfil->constraint_rates.count > 0) in fsl_micfil_startup()
526 snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_micfil_startup()
528 &micfil->constraint_rates); in fsl_micfil_startup()
539 /* Voice Activity Detector Error Interruption */ in fsl_micfil_configure_hwvad_interrupts()
540 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
543 /* Voice Activity Detector Interruption */ in fsl_micfil_configure_hwvad_interrupts()
544 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
550 /* Configuration done only in energy-based initialization mode */
554 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
558 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
562 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
566 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
570 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
574 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
578 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
582 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
588 /* Configuration done only in envelope-based initialization mode */
592 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
596 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
600 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
604 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
608 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
612 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
616 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
620 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
632 * -> Eneveope-based mode (section 8.4.1)
633 * -> Energy-based mode (section 8.4.2)
635 * It is important to remark that the HWVAD detector could be enabled
643 micfil->vad_detected = 0; in fsl_micfil_hwvad_enable()
645 /* envelope-based specific initialization */ in fsl_micfil_hwvad_enable()
646 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) in fsl_micfil_hwvad_enable()
653 /* Voice Activity Detector Internal Filters Initialization*/ in fsl_micfil_hwvad_enable()
654 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
657 /* Voice Activity Detector Internal Filter */ in fsl_micfil_hwvad_enable()
658 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
666 /* Voice Activity Detector Reset */ in fsl_micfil_hwvad_enable()
667 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
670 /* Voice Activity Detector Enabled */ in fsl_micfil_hwvad_enable()
671 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
679 struct device *dev = &micfil->pdev->dev; in fsl_micfil_hwvad_disable()
683 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_disable()
698 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
711 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
712 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
713 * 01 - DMA req enabled in fsl_micfil_trigger()
714 * 10 - IRQ enabled in fsl_micfil_trigger()
715 * 11 - reserved in fsl_micfil_trigger()
717 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
724 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
729 if (micfil->vad_enabled && !micfil->dec_bypass) in fsl_micfil_trigger()
736 if (micfil->vad_enabled && !micfil->dec_bypass) in fsl_micfil_trigger()
740 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
745 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
752 return -EINVAL; in fsl_micfil_trigger()
759 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
765 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
768 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
769 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
790 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
796 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
797 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
805 micfil->mclk_flag = true; in fsl_micfil_hw_params()
808 switch (micfil->quality) { in fsl_micfil_hw_params()
827 micfil->dec_bypass = true; in fsl_micfil_hw_params()
835 micfil->dec_bypass = false; in fsl_micfil_hw_params()
839 ret = clk_set_rate(micfil->mclk, mclk_rate); in fsl_micfil_hw_params()
847 regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
849 micfil->dec_bypass ? MICFIL_CTRL2_DEC_BYPASS : 0); in fsl_micfil_hw_params()
851 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
854 FIELD_PREP(MICFIL_CTRL2_CICOSR, 32 - osr)); in fsl_micfil_hw_params()
857 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
859 FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
862 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
864 FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); in fsl_micfil_hw_params()
866 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
867 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
868 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
869 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
870 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
871 if (micfil->soc->use_edma) in fsl_micfil_hw_params()
872 micfil->dma_params_rx.maxburst = channels; in fsl_micfil_hw_params()
882 clk_disable_unprepare(micfil->mclk); in fsl_micfil_hw_free()
883 micfil->mclk_flag = false; in fsl_micfil_hw_free()
890 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
891 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
895 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
896 micfil->card = cpu_dai->component->card; in fsl_micfil_dai_probe()
899 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
904 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
910 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
913 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
915 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
916 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
918 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
929 if (micfil->soc->volume_sx) in fsl_micfil_component_probe()
949 .stream_name = "CPU-Capture",
959 .name = "fsl-micfil-dai",
999 {REG_MICFIL_DATACH0 - 0x4, 0x00000000},
1000 {REG_MICFIL_DATACH1 - 0x4, 0x00000000},
1001 {REG_MICFIL_DATACH2 - 0x4, 0x00000000},
1002 {REG_MICFIL_DATACH3 - 0x4, 0x00000000},
1003 {REG_MICFIL_DATACH4 - 0x4, 0x00000000},
1004 {REG_MICFIL_DATACH5 - 0x4, 0x00000000},
1005 {REG_MICFIL_DATACH6 - 0x4, 0x00000000},
1006 {REG_MICFIL_DATACH7 - 0x4, 0x00000000},
1022 int ofs = micfil->soc->fifo_offset; in fsl_micfil_readable_reg()
1047 if (micfil->soc->use_verid) in fsl_micfil_readable_reg()
1076 if (micfil->soc->use_verid) in fsl_micfil_writeable_reg()
1087 int ofs = micfil->soc->fifo_offset; in fsl_micfil_volatile_reg()
1139 struct platform_device *pdev = micfil->pdev; in micfil_isr()
1146 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
1147 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
1148 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
1152 /* Channel 0-7 Output Data Flags */ in micfil_isr()
1155 dev_dbg(&pdev->dev, in micfil_isr()
1161 regmap_write_bits(micfil->regmap, in micfil_isr()
1169 dev_dbg(&pdev->dev, in micfil_isr()
1174 dev_dbg(&pdev->dev, in micfil_isr()
1185 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
1190 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
1193 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
1196 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
1199 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
1200 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
1204 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_err_isr()
1205 regmap_write_bits(micfil->regmap, REG_MICFIL_FIFO_STAT, in micfil_err_isr()
1208 regmap_read(micfil->regmap, REG_MICFIL_OUT_STAT, &out_stat_reg); in micfil_err_isr()
1209 regmap_write_bits(micfil->regmap, REG_MICFIL_OUT_STAT, in micfil_err_isr()
1220 if (!micfil->card) in voice_detected_fn()
1223 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); in voice_detected_fn()
1227 if (micfil->vad_detected) in voice_detected_fn()
1228 snd_ctl_notify(micfil->card->snd_card, in voice_detected_fn()
1230 &kctl->id); in voice_detected_fn()
1238 struct device *dev = &micfil->pdev->dev; in hwvad_isr()
1242 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_isr()
1252 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, in hwvad_isr()
1256 micfil->vad_detected = 1; in hwvad_isr()
1269 struct device *dev = &micfil->pdev->dev; in hwvad_err_isr()
1272 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_err_isr()
1285 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
1291 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
1293 return -ENOMEM; in fsl_micfil_probe()
1295 micfil->pdev = pdev; in fsl_micfil_probe()
1296 strscpy(micfil->name, np->name, sizeof(micfil->name)); in fsl_micfil_probe()
1298 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
1303 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
1304 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
1305 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
1306 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
1307 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
1310 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
1311 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
1312 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
1313 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
1314 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
1317 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
1318 &micfil->pll11k_clk); in fsl_micfil_probe()
1320 micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk; in fsl_micfil_probe()
1321 micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk; in fsl_micfil_probe()
1322 micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3"); in fsl_micfil_probe()
1323 if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3])) in fsl_micfil_probe()
1324 micfil->clk_src[MICFIL_CLK_EXT3] = NULL; in fsl_micfil_probe()
1326 fsl_asoc_constrain_rates(&micfil->constraint_rates, in fsl_micfil_probe()
1328 micfil->clk_src[MICFIL_AUDIO_PLL1], in fsl_micfil_probe()
1329 micfil->clk_src[MICFIL_AUDIO_PLL2], in fsl_micfil_probe()
1330 micfil->clk_src[MICFIL_CLK_EXT3], in fsl_micfil_probe()
1331 micfil->constraint_rates_list); in fsl_micfil_probe()
1338 if (of_device_is_compatible(np, "fsl,imx943-micfil")) in fsl_micfil_probe()
1339 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1343 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1346 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
1347 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
1348 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
1349 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
1356 &micfil->dataline); in fsl_micfil_probe()
1358 micfil->dataline = 1; in fsl_micfil_probe()
1360 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
1361 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
1362 micfil->soc->dataline); in fsl_micfil_probe()
1363 return -EINVAL; in fsl_micfil_probe()
1368 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
1369 if (micfil->irq[i] < 0) in fsl_micfil_probe()
1370 return micfil->irq[i]; in fsl_micfil_probe()
1374 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
1376 micfil->name, micfil); in fsl_micfil_probe()
1378 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
1379 micfil->irq[0]); in fsl_micfil_probe()
1384 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
1386 micfil->name, micfil); in fsl_micfil_probe()
1388 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
1389 micfil->irq[1]); in fsl_micfil_probe()
1393 /* Digital Microphone interface voice activity detector event */ in fsl_micfil_probe()
1394 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], in fsl_micfil_probe()
1396 IRQF_SHARED, micfil->name, micfil); in fsl_micfil_probe()
1398 dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", in fsl_micfil_probe()
1399 micfil->irq[0]); in fsl_micfil_probe()
1403 /* Digital Microphone interface voice activity detector error */ in fsl_micfil_probe()
1404 ret = devm_request_irq(&pdev->dev, micfil->irq[3], in fsl_micfil_probe()
1406 micfil->name, micfil); in fsl_micfil_probe()
1408 dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", in fsl_micfil_probe()
1409 micfil->irq[1]); in fsl_micfil_probe()
1413 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
1414 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0 + micfil->soc->fifo_offset; in fsl_micfil_probe()
1415 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
1419 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
1420 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_micfil_probe()
1421 ret = fsl_micfil_runtime_resume(&pdev->dev); in fsl_micfil_probe()
1426 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_micfil_probe()
1431 ret = fsl_micfil_use_verid(&pdev->dev); in fsl_micfil_probe()
1433 dev_warn(&pdev->dev, "Error reading MICFIL version: %d\n", ret); in fsl_micfil_probe()
1435 ret = pm_runtime_put_sync(&pdev->dev); in fsl_micfil_probe()
1436 if (ret < 0 && ret != -ENOSYS) in fsl_micfil_probe()
1439 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
1445 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
1447 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
1451 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
1453 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
1456 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
1464 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_micfil_probe()
1465 fsl_micfil_runtime_suspend(&pdev->dev); in fsl_micfil_probe()
1467 pm_runtime_disable(&pdev->dev); in fsl_micfil_probe()
1474 pm_runtime_disable(&pdev->dev); in fsl_micfil_remove()
1481 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
1483 if (micfil->mclk_flag) in fsl_micfil_runtime_suspend()
1484 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
1485 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
1495 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
1499 if (micfil->mclk_flag) { in fsl_micfil_runtime_resume()
1500 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
1502 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
1507 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
1508 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
1509 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
1523 .name = "fsl-micfil-dai",
1530 MODULE_AUTHOR("Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>");