Lines Matching +full:stream +full:- +full:id +full:- +full:range
1 /* SPDX-License-Identifier: MIT */
17 * subject to backwards-compatibility constraints.
28 * The diagram below represents a high-level simplification of a discrete
72 * - &DRM_IOCTL_XE_DEVICE_QUERY
73 * - &DRM_IOCTL_XE_GEM_CREATE
74 * - &DRM_IOCTL_XE_GEM_MMAP_OFFSET
75 * - &DRM_IOCTL_XE_VM_CREATE
76 * - &DRM_IOCTL_XE_VM_DESTROY
77 * - &DRM_IOCTL_XE_VM_BIND
78 * - &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
79 * - &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
80 * - &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
81 * - &DRM_IOCTL_XE_EXEC
82 * - &DRM_IOCTL_XE_WAIT_USER_FENCE
83 * - &DRM_IOCTL_XE_OBSERVATION
89 * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
106 /* Must be kept compact -- no holes */
141 * .. code-block:: C
162 * struct drm_xe_user_extension - Base class for defining a chain of extensions
192 * struct drm_xe_ext_set_property - Generic set property extension
215 * struct drm_xe_engine_class_instance - instance of an engine class
222 * - %DRM_XE_ENGINE_CLASS_RENDER
223 * - %DRM_XE_ENGINE_CLASS_COPY
224 * - %DRM_XE_ENGINE_CLASS_VIDEO_DECODE
225 * - %DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE
226 * - %DRM_XE_ENGINE_CLASS_COMPUTE
227 * - %DRM_XE_ENGINE_CLASS_VM_BIND - Kernel only classes (not actual
238 /** @engine_class: engine class id */
240 /** @engine_instance: engine instance id */
242 /** @gt_id: Unique ID of this GT within the PCI Device */
249 * struct drm_xe_engine - describe hardware engine
260 * struct drm_xe_query_engines - describe engines
276 * enum drm_xe_memory_class - Supported memory classes.
290 * struct drm_xe_mem_region - Describes some region as known to
301 * @instance: The unique ID for this region, which serves as the
307 * @min_page_size: Min page-size in bytes for this region.
315 * address and range aligned to this value.
316 * Affected IOCTLS will return %-EINVAL if alignment restrictions are
366 * struct drm_xe_query_mem_regions - describe memory regions
382 * struct drm_xe_query_config - describe the device configuration
389 * - %DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID - Device ID (lower 16 bits)
391 * - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device
394 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device
396 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY - Flag is set if the device
398 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
400 * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
402 * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
403 * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
426 * struct drm_xe_gt - describe an individual GT.
434 * - %DRM_XE_QUERY_GT_TYPE_MAIN
435 * - %DRM_XE_QUERY_GT_TYPE_MEDIA
442 /** @tile_id: Tile ID where this GT lives (Information only) */
444 /** @gt_id: Unique ID of this GT within the PCI Device */
485 * struct drm_xe_query_gt_list - A list with GT description items.
501 * struct drm_xe_query_topology_mask - describe the topology mask of a GT
511 * - %DRM_XE_TOPO_DSS_GEOMETRY - To query the mask of Dual Sub Slices
516 * - %DRM_XE_TOPO_DSS_COMPUTE - To query the mask of Dual Sub Slices
521 * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type
524 * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
530 * - %DRM_XE_TOPO_SIMD16_EU_PER_DSS - To query the mask of SIMD16 Execution
538 /** @gt_id: GT ID the mask is associated with */
552 /** @mask: little-endian mask of @num_bytes */
557 * struct drm_xe_query_engine_cycles - correlate CPU and GPU timestamps
577 * @clockid: This is input by the user and is the reference clock id for
608 * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
611 * of the micro-controller firmware.
614 /** @uc_type: The micro-controller type to query firmware version */
639 * struct drm_xe_query_pxp_status - query if PXP is ready
648 * -ENODEV: PXP not supported or disabled;
649 * -EIO: fatal error occurred during init, so PXP will never be enabled;
650 * -EINVAL: incorrect value provided as part of the query;
651 * -EFAULT: error copying the memory between kernel and userspace.
672 * struct drm_xe_device_query - Input of &DRM_IOCTL_XE_DEVICE_QUERY - main
680 * - %DRM_XE_DEVICE_QUERY_ENGINES
681 * - %DRM_XE_DEVICE_QUERY_MEM_REGIONS
682 * - %DRM_XE_DEVICE_QUERY_CONFIG
683 * - %DRM_XE_DEVICE_QUERY_GT_LIST
684 * - %DRM_XE_DEVICE_QUERY_HWCONFIG - Query type to retrieve the hardware
688 * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY
689 * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES
690 * - %DRM_XE_DEVICE_QUERY_PXP_STATUS
696 * IOCTL call returns -EINVAL.
701 * .. code-block:: C
714 * for (int i = 0; i < engines->num_engines; i++) {
716 * engines->engines[i].instance.engine_class ==
718 * engines->engines[i].instance.engine_class ==
720 * engines->engines[i].instance.engine_class ==
722 * engines->engines[i].instance.engine_class ==
724 * engines->engines[i].instance.engine_class ==
759 * struct drm_xe_gem_create - Input of &DRM_IOCTL_XE_GEM_CREATE - A structure for
763 * - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING
764 * - %DRM_XE_GEM_CREATE_FLAG_SCANOUT
765 * - %DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM - When using VRAM as a
768 * for small-bar systems (on full-bar systems this gets turned into a
775 * Note2: For clear-color CCS surfaces the kernel needs to read the
776 * clear-color value stored in the buffer, and on discrete platforms we
779 * small-bar systems.
782 * - %DRM_XE_GEM_CPU_CACHING_WB - Allocate the pages with write-back
785 * - %DRM_XE_GEM_CPU_CACHING_WC - Allocate the pages as write-combined. This
793 * - %DRM_XE_GEM_CREATE_SET_PROPERTY_PXP_TYPE - set the type of PXP session
857 * between GPU- and CPU is guaranteed. The caching mode of
858 * existing CPU-mappings will be updated transparently to
859 * user-space clients.
870 * struct drm_xe_gem_mmap_offset - Input of &DRM_IOCTL_XE_GEM_MMAP_OFFSET
873 * - %DRM_XE_MMAP_OFFSET_FLAG_PCI_BARRIER - For user to query special offset
887 * .. code-block:: C
917 * struct drm_xe_vm_create - Input of &DRM_IOCTL_XE_VM_CREATE
920 * - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE
921 * - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts
926 * used as out-syncobjs, that is, together with DRM_XE_SYNC_FLAG_SIGNAL.
927 * LR VMs can be created in recoverable page-fault mode using
930 * different per-VM overcommit semantics that are enabled by
933 * - %DRM_XE_VM_CREATE_FLAG_FAULT_MODE - Requires also
935 * demand when accessed, and also allows per-VM overcommit of memory.
949 /** @vm_id: Returned VM ID */
957 * struct drm_xe_vm_destroy - Input of &DRM_IOCTL_XE_VM_DESTROY
960 /** @vm_id: VM ID */
971 * struct drm_xe_vm_bind_op - run bind operations
974 * - %DRM_XE_VM_BIND_OP_MAP
975 * - %DRM_XE_VM_BIND_OP_UNMAP
976 * - %DRM_XE_VM_BIND_OP_MAP_USERPTR
977 * - %DRM_XE_VM_BIND_OP_UNMAP_ALL
978 * - %DRM_XE_VM_BIND_OP_PREFETCH
981 * - %DRM_XE_VM_BIND_FLAG_READONLY - Setup the page tables as read-only
983 * - %DRM_XE_VM_BIND_FLAG_IMMEDIATE - On a faulting VM, do the
985 * fault handler. This is implied on a non-faulting VM as there is no
987 * - %DRM_XE_VM_BIND_FLAG_NULL - When the NULL flag is set, the page
993 * - %DRM_XE_VM_BIND_FLAG_CHECK_PXP - If the object is encrypted via PXP,
996 * - %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR - When the CPU address mirror flag is
997 * set, no mappings are created rather the range is reserved for CPU address
1023 * there is a mismatch (see note below for pre-MTL platforms).
1025 * Note: On pre-MTL platforms there is only a caching mode and no
1027 * shared-LLC (or is dgpu) so all GT memory accesses are coherent with
1032 * levels into the following coherency buckets on all pre-MTL platforms:
1034 * ppGTT UC -> COH_NONE
1035 * ppGTT WC -> COH_NONE
1036 * ppGTT WT -> COH_NONE
1037 * ppGTT WB -> COH_AT_LEAST_1WAY
1040 * such platforms (or perhaps in general for dma-buf if shared with
1043 * have a shared-LLC. On MTL+ this completely changes and the HW
1047 * Note: For userptr and externally imported dma-buf the kernel expects
1083 * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
1085 __u64 range; member
1122 * struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND
1129 * .. code-block:: C
1137 * .bind.range = BO_SIZE,
1152 /** @vm_id: The ID of the VM to bind to */
1193 * struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
1199 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY - set the queue priority.
1201 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE - set the queue timeslice
1203 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE - set the type of PXP session
1209 * Given that going into a power-saving state kills PXP HWDRM sessions,
1217 * .. code-block:: C
1268 /** @exec_queue_id: Returned exec queue ID */
1272 * @instances: user pointer to a 2-d array of struct
1285 * struct drm_xe_exec_queue_destroy - Input of &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
1288 /** @exec_queue_id: Exec queue ID */
1299 * struct drm_xe_exec_queue_get_property - Input of &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
1302 * - %DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN
1308 /** @exec_queue_id: Exec queue ID */
1323 * struct drm_xe_sync - sync object
1326 * - %DRM_XE_SYNC_TYPE_SYNCOBJ
1327 * - %DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ
1328 * - %DRM_XE_SYNC_TYPE_USER_FENCE
1331 * - %DRM_XE_SYNC_FLAG_SIGNAL
1335 * .. code-block:: C
1397 * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
1404 * .. code-block:: C
1420 /** @exec_queue_id: Exec queue ID for the batch buffer */
1449 * struct drm_xe_wait_user_fence - Input of &DRM_IOCTL_XE_WAIT_USER_FENCE
1451 * Wait on user fence, XE will wake-up on every HW engine interrupt in the
1459 * - %DRM_XE_UFENCE_WAIT_OP_EQ
1460 * - %DRM_XE_UFENCE_WAIT_OP_NEQ
1461 * - %DRM_XE_UFENCE_WAIT_OP_GT
1462 * - %DRM_XE_UFENCE_WAIT_OP_GTE
1463 * - %DRM_XE_UFENCE_WAIT_OP_LT
1464 * - %DRM_XE_UFENCE_WAIT_OP_LTE
1467 * - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME
1468 * - %DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP
1471 * - 0xffu for u8
1472 * - 0xffffu for u16
1473 * - 0xffffffffu for u32
1474 * - 0xffffffffffffffffu for u64
1534 * enum drm_xe_observation_type - Observation stream types
1537 /** @DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type */
1539 /** @DRM_XE_OBSERVATION_TYPE_EU_STALL: EU stall sampling observation stream type */
1544 * enum drm_xe_observation_op - Observation stream ops
1547 /** @DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream */
1550 /** @DRM_XE_OBSERVATION_OP_ADD_CONFIG: Add observation stream config */
1553 /** @DRM_XE_OBSERVATION_OP_REMOVE_CONFIG: Remove observation stream config */
1558 * struct drm_xe_observation_param - Input of &DRM_XE_OBSERVATION
1561 * multiple types. The actual params for a particular stream operation are
1568 /** @observation_type: observation stream type, of enum @drm_xe_observation_type */
1570 /** @observation_op: observation stream op, of enum @drm_xe_observation_op */
1572 /** @param: Pointer to actual stream params */
1577 * enum drm_xe_observation_ioctls - Observation stream fd ioctl's
1580 * ioctl's is stream type specific
1583 /** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */
1586 /** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for a observation stream */
1589 /** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */
1592 /** @DRM_XE_OBSERVATION_IOCTL_STATUS: Return observation stream status */
1595 /** @DRM_XE_OBSERVATION_IOCTL_INFO: Return observation stream info */
1600 * enum drm_xe_oa_unit_type - OA unit types
1605 * sub-types of OAG. For OAR/OAC, use OAG.
1614 * struct drm_xe_oa_unit - describe OA unit
1620 /** @oa_unit_id: OA unit ID */
1626 /** @capabilities: OA capabilities bit-mask */
1647 * struct drm_xe_query_oa_units - describe OA units
1656 * .. code-block:: C
1663 * poau = (u8 *)&qoa->oa_units[0];
1664 * for (int i = 0; i < qoa->num_oa_units; i++) {
1667 * poau += sizeof(*oau) + oau->num_engines * sizeof(oau->eci[0]);
1686 * enum drm_xe_oa_format_type - OA format types as specified in PRM/Bspec
1705 * enum drm_xe_oa_property_id - OA stream property id's
1707 * Stream params are specified as a chain of @drm_xe_ext_set_property
1713 * Exactly the same mechanism is also used for stream reconfiguration using the
1714 * @DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a
1715 * subset of properties below can be specified for stream reconfiguration.
1720 * @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open
1721 * the OA stream, see @oa_unit_id in 'struct
1728 * OA unit reports or stream samples in a global buffer attached to an
1760 * stream in a DISABLED state (see @DRM_XE_OBSERVATION_IOCTL_ENABLE).
1765 * @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific
1778 * to be disabled for the stream exec queue.
1814 * struct drm_xe_oa_config - OA metric configuration
1817 * particular config can be specified when opening an OA stream using
1824 /** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */
1838 * struct drm_xe_oa_stream_status - OA stream status returned from
1839 * @DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can
1840 * call the ioctl to query stream status in response to EIO errno from
1847 /** @oa_status: OA stream status (see Bspec 46717/61226) */
1859 * struct drm_xe_oa_stream_info - OA stream info returned from
1860 * @DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl
1874 * enum drm_xe_pxp_session_type - Supported PXP session types.
1890 /* ID of the protected content session managed by Xe when PXP is active */
1894 * enum drm_xe_eu_stall_property_id - EU stall sampling input property ids.
1903 * the EU stall stream fd with @DRM_XE_OBSERVATION_IOCTL_ENABLE before
1930 * struct drm_xe_query_eu_stall - Information about EU stall sampling.
1940 /** @capabilities: EU stall capabilities bit-mask */