Lines Matching +full:little +full:- +full:endian
39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
76 * - Kernel and user-space drivers: for drivers it's important that modifiers
80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
93 * -----------------------
98 * upstream in-kernel or open source userspace user does not apply.
108 #define DRM_FORMAT_BIG_ENDIAN (1U<<31) /* format is big endian instead of little endian */
144 #define DRM_FORMAT_R10 fourcc_code('R', '1', '0', ' ') /* [15:0] x:R 6:10 little endian */
147 #define DRM_FORMAT_R12 fourcc_code('R', '1', '2', ' ') /* [15:0] x:R 4:12 little endian */
150 #define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
153 #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
154 #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
157 #define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
158 #define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
165 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian…
166 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian…
167 #define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian…
168 #define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian…
170 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian…
171 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian…
172 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian…
173 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian…
175 #define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian…
176 #define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian…
177 #define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian…
178 #define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian…
180 #define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian…
181 #define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian…
182 #define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian…
183 #define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian…
185 #define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
186 #define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */
189 #define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
190 #define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */
193 #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian…
194 #define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian…
195 #define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian…
196 #define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian…
198 #define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian…
199 #define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian…
200 #define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian…
201 #define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian…
203 …RM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
204 …RM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
205 …RM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
206 …RM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */
208 …RM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
209 …RM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
210 …RM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
211 …RM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
214 …_FORMAT_XRGB16161616 fourcc_code('X', 'R', '4', '8') /* [63:0] x:R:G:B 16:16:16:16 little endian */
215 …_FORMAT_XBGR16161616 fourcc_code('X', 'B', '4', '8') /* [63:0] x:B:G:R 16:16:16:16 little endian */
217 …_FORMAT_ARGB16161616 fourcc_code('A', 'R', '4', '8') /* [63:0] A:R:G:B 16:16:16:16 little endian */
218 …_FORMAT_ABGR16161616 fourcc_code('A', 'B', '4', '8') /* [63:0] A:B:G:R 16:16:16:16 little endian */
222 * IEEE 754-2008 binary16 half-precision float
225 …FORMAT_XRGB16161616F fourcc_code('X', 'R', '4', 'H') /* [63:0] x:R:G:B 16:16:16:16 little endian */
226 …FORMAT_XBGR16161616F fourcc_code('X', 'B', '4', 'H') /* [63:0] x:B:G:R 16:16:16:16 little endian */
228 …FORMAT_ARGB16161616F fourcc_code('A', 'R', '4', 'H') /* [63:0] A:R:G:B 16:16:16:16 little endian */
229 …FORMAT_ABGR16161616F fourcc_code('A', 'B', '4', 'H') /* [63:0] A:B:G:R 16:16:16:16 little endian */
232 * RGBA format with 10-bit components packed in 64-bit per pixel, with 6 bits
235 …6106 fourcc_code('A', 'B', '1', '0') /* [63:0] A:x:B:x:G:x:R:x 10:6:10:6:10:6:10:6 little endian */
238 …e DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
239 …e DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
240 …e DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
241 …e DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
243 #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian …
244 …ne DRM_FORMAT_AVUY8888 fourcc_code('A', 'V', 'U', 'Y') /* [31:0] A:Cr:Cb:Y 8:8:8:8 little endian */
245 …ne DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
246 …ne DRM_FORMAT_XVUY8888 fourcc_code('X', 'V', 'U', 'Y') /* [31:0] X:Cr:Cb:Y 8:8:8:8 little endian */
247 #define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
248 …010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only …
252 * 16-xx padding occupy lsb
254 …', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian per 2 Y pixels…
255 …', '2', '1', '2') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 12:4:12:4:12:4:12:4 little endian per 2 Y pixels…
256 … fourcc_code('Y', '2', '1', '6') /* [63:0] Cr0:Y1:Cb0:Y0 16:16:16:16 little endian per 2 Y pixels…
260 * 16-xx padding occupy lsb except Y410
262 …FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
263 … fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
264 …ORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 little endian */
266 …_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
267 …16 fourcc_code('X', 'V', '3', '6') /* [63:0] X:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
268 …ORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') /* [63:0] X:Cr:Y:Cb 16:16:16:16 little endian */
274 …:0] A3:A2:Y3:0:Cr0:0:Y2:0:A1:A0:Y1:0:Cb0:0:Y0:0 1:1:8:2:8:2:8:2:1:1:8:2:8:2:8:2 little endian */
276 …:0] X3:X2:Y3:0:Cr0:0:Y2:0:X1:X0:Y1:0:Cb0:0:Y0:0 1:1:8:2:8:2:8:2:1:1:8:2:8:2:8:2 little endian */
279 /* [63:0] A3:A2:Y3:Cr0:Y2:A1:A0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
281 /* [63:0] X3:X2:Y3:Cr0:Y2:X1:X0:Y1:Cb0:Y0 1:1:10:10:10:1:1:10:10:10 little endian */
285 * 1-plane YUV 4:2:0
288 * These formats can only be used with a non-Linear modifier.
310 * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
312 * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
318 #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
319 #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
322 * index 0 = Y plane, [39:0] Y3:Y2:Y1:Y0 little endian
323 * index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
327 #define DRM_FORMAT_NV30 fourcc_code('N', 'V', '3', '0') /* non-subsampled Cr:Cb plane */
331 * index 0 = Y plane, [15:0] Y:x [10:6] little endian
332 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
338 * index 0 = Y plane, [15:0] Y:x [10:6] little endian
339 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
345 * index 0 = Y plane, [15:0] Y:x [12:4] little endian
346 * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [12:4:12:4] little endian
352 * index 0 = Y plane, [15:0] Y little endian
353 * index 1 = Cr:Cb plane, [31:0] Cr:Cb [16:16] little endian
359 * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
360 * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
364 /* 3 plane non-subsampled (444) YCbCr
366 * index 0: Y plane, [15:0] Y:x [10:6] little endian
367 * index 1: Cb plane, [15:0] Cb:x [10:6] little endian
368 * index 2: Cr plane, [15:0] Cr:x [10:6] little endian
372 /* 3 plane non-subsampled (444) YCrCb
374 * index 0: Y plane, [15:0] Y:x [10:6] little endian
375 * index 1: Cr plane, [15:0] Cr:x [10:6] little endian
376 * index 2: Cb plane, [15:0] Cb:x [10:6] little endian
397 #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) plane…
398 #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) plane…
404 * Format modifiers describe, typically, a re-ordering or modification
408 * The upper 8 bits of the format modifier are a vendor-id as assigned
428 #define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
448 * DRM_FORMAT_MOD_GENERIC_* definitions are used to provide vendor-neutral names
450 * compatibility, in cases where a vendor-specific definition already exists and
455 * generic layouts (such as pixel re-ordering), which may have
456 * independently-developed support across multiple vendors.
459 * vendor-specific modifier, a new 'GENERIC' vendor or modifier using vendor
486 * which tells the driver to also take driver-internal information into account
496 * used is out-of-band information carried in an API-specific way (e.g. in a
504 * Intel X-tiling layout
507 * in row-major layout. Within the tile bytes are laid out row-major, with
508 * a platform-dependent stride. On top of that the memory can apply
509 * platform-depending swizzling of some higher address bits into bit6.
513 * cross-driver sharing. It exists since on a given platform it does uniquely
514 * identify the layout in a simple way for i915-specific userspace, which
521 * Intel Y-tiling layout
524 * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
525 * chunks column-major, with a platform-dependent height. On top of that the
526 * memory can apply platform-depending swizzling of some higher address bits
531 * cross-driver sharing. It exists since on a given platform it does uniquely
532 * identify the layout in a simple way for i915-specific userspace, which
539 * Intel Yf-tiling layout
541 * This is a tiled layout using 4Kb tiles in row-major layout.
542 * Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
543 * are arranged in four groups (two wide, two high) with column-major layout.
545 * out as 2x2 column-major.
557 * The main surface will be plane index 0 and must be Y/Yf-tiled,
574 * Intel color control surfaces (CCS) for Gen-12 render compression.
576 * The main surface is Y-tiled and at plane index 0, the CCS is linear and
580 * Y-tile widths.
585 * Intel color control surfaces (CCS) for Gen-12 media compression
587 * The main surface is Y-tiled and at plane index 0, the CCS is linear and
591 * Y-tile widths. For semi-planar formats like NV12, CCS planes follow the
598 * Intel Color Control Surface with Clear Color (CCS) for Gen-12 render
601 * The main surface is Y-tiled and is at plane index 0 whereas CCS is linear
619 * This is a tiled layout using 4KB tiles in a row-major layout. It has the same
640 * The main surface is Tile 4 and at plane index 0. For semi-planar formats
681 * tile4 widths. For semi-planar formats like NV12, CCS planes follow the
710 * The main surface is Tile 4 and at plane index 0. For semi-planar formats
722 * The main surface is Tile 4 and at plane index 0. For semi-planar formats
732 * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
734 * Macroblocks are laid in a Z-shape, and each pixel data is following the
739 * - multiple of 128 pixels for the width
740 * - multiple of 32 pixels for the height
742 * For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
747 * Tiled, 16 (pixels) x 16 (lines) - sized macroblocks
749 * This is a simple tiled layout using tiles of 16x16 pixels in a row-major
759 * Implementation may be platform and base-format specific.
772 * Implementation may be platform and base-format specific.
785 * Implementation may be platform and base-format specific.
795 * This is a simple tiled layout using tiles of 4x4 pixels in a row-major
801 * Vivante 64x64 super-tiling layout
803 * This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
804 * contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row-
808 * https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling
813 * Vivante 4x4 tiling layout for dual-pipe
817 * compared to the non-split tiled layout.
822 * Vivante 64x64 super-tiling layout for dual-pipe
824 * Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile
826 * therefore halved compared to the non-split super-tiled layout.
831 * Vivante TS (tile-status) buffer modifiers. They can be combined with all of
883 * ---- ----- -----------------------------------------------------------------
887 * DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK()-based modifiers.
889 * 4:4 - Must be 1, to indicate block-linear layout. Necessary for
891 * DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK()-based modifiers.
893 * 8:5 - Reserved (To support 3D-surfaces with variable log2(depth) block
901 * 11:9 - Reserved (To support 2D-array textures with variable array stride
922 * 0 = Gob Height 8, Fermi - Volta, Tegra K1+ Page Kind mapping
923 * 1 = Gob Height 4, G80 - GT2XX Page Kind mapping
933 * 0 = Tegra K1 - Tegra Parker/TX2 Layout.
949 * 55:25 - Reserved for future use. Must be zero.
961 * with block-linear layouts, is remapped within drivers to the value 0xfe,
962 * which corresponds to the "generic" kind used for simple single-sample
963 * uncompressed color formats on Fermi - Volta GPUs.
980 * Within a GOB, data is ordered as 16B x 2 lines sectors laid in Z-shape.
1023 ((1ULL << __fourcc_mod_broadcom_param_bits) - 1)))
1025 ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << \
1034 * - 64b utiles of pixels in a raster-order grid according to cpp. It's 4x4
1037 * - 1k subtiles made of a 4x4 raster-order grid of 64b utiles (so usually
1040 * - 4k tiles made of a 2x2 grid of 1k subtiles (so usually 32x32 pixels). On
1044 * - an image made of 4k tiles in rows either left-to-right (even rows of 4k
1045 * tiles) or right-to-left (odd rows of 4k tiles).
1068 * and UV. Some SAND-using hardware stores UV in a separate tiled
1112 * the assumption is that a no-XOR tiling modifier will be created.
1120 * It provides fine-grained random access and minimizes the amount of data
1125 * and different devices or use-cases may support different combinations.
1157 * Multiple superblock sizes are only valid for multi-plane YCbCr formats.
1174 * AFBC block-split
1195 * AFBC copy-block restrict
1197 * Buffers with this flag must obey the copy-block restriction. The restriction
1198 * is such that there are no copy-blocks referring across the border of 8x8
1218 * Indicates that the buffer makes use of solid-color blocks, whereby bandwidth
1224 * AFBC double-buffer
1226 * Indicates that the buffer is allocated in a layout safe for front-buffer
1234 * Indicates that the buffer includes per-superblock content hints.
1251 * Arm Fixed-Rate Compression (AFRC) modifiers
1255 * reductions in graphics and media use-cases.
1271 * ---------------- ---------------
1282 * ------ ----------------- ------------------
1291 * ----------------------------- --------- ----------------- ------------------
1294 * 16x4 chroma 'V' values, in the 'V' plane of a fully-planar YUV buffer
1295 * ----------------------------- --------- ----------------- ------------------
1298 * 8x8 chroma 'V' values, in the 'V' plane of a fully-planar YUV buffer
1299 * ----------------------------- --------- ----------------- ------------------
1301 * Example: 8x4 chroma pairs in the 'UV' plane of a semi-planar YUV buffer
1302 * ----------------------------- --------- ----------------- ------------------
1305 * ----------------------------- --------- ----------------- ------------------
1324 * this is the only plane, while for semi-planar and fully-planar YUV buffers,
1329 * For semi-planar and fully-planar YUV buffers, this corresponds to the chroma plane(s).
1331 * For single-plane buffers, AFRC_FORMAT_MOD_CU_SIZE_P0 must be specified
1333 * For semi-planar and fully-planar buffers, both AFRC_FORMAT_MOD_CU_SIZE_P0 and
1347 * Indicates if the buffer uses the scanline-optimised layout
1348 * for an AFRC encoded buffer, otherwise, it uses the rotation-optimised layout.
1354 * Arm 16x16 Block U-Interleaved modifier
1373 * both in row-major order.
1387 * The underlying storage is considered to be 3 components, 8bit or 10-bit
1389 * - DRM_FORMAT_YUV420_8BIT
1390 * - DRM_FORMAT_YUV420_10BIT
1414 * - a body content organized in 64x32 superblocks with 4096 bytes per
1416 * - a 32 bytes per 128x64 header block
1434 * be accessible by the user-space clients, but only accessible by the
1437 * The user-space clients should expect a failure while trying to mmap
1438 * the DMA-BUF handle returned by the producer.
1459 * ----- ------------------------ ---------------------------------------------
1479 * Bits 8-15 specify compression options
1486 * Bits 16-23 specify how the bits of 10 bit formats are
1503 * - main surface
1506 * - main surface in plane 0
1507 * - DCC surface in plane 1 (RB-aligned, pipe-aligned if DCC_PIPE_ALIGN is set)
1510 * - main surface in plane 0
1511 * - displayable DCC surface in plane 1 (not RB-aligned & not pipe-aligned)
1512 * - pipe-aligned DCC surface in plane 2 (RB-aligned & pipe-aligned)
1514 * For multi-plane formats the above surfaces get merged into one plane for
1518 * ----- ------------------------ ---------------------------------------------
1534 * 55:36 - Reserved for future use, must be zero
1554 * 64K_D for non-32 bpp is the same for GFX9/GFX10/GFX10_RBPLUS and hence has
1567 * 0 - LINEAR
1568 * 1 - 256B_2D - 2D block dimensions
1569 * 2 - 4KB_2D
1570 * 3 - 64KB_2D
1571 * 4 - 256KB_2D
1572 * 5 - 4KB_3D - 3D block dimensions
1573 * 6 - 64KB_3D
1574 * 7 - 256KB_3D
1596 * one which is not-aligned.