Lines Matching +full:led +full:- +full:speed +full:- +full:mode
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
56 * Set phydev->irq to PHY_POLL if interrupts are not supported,
60 #define PHY_POLL -1
61 #define PHY_MAC_INTERRUPT -2
70 * enum phy_interface_t - Interface Mode definitions
72 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
74 * @PHY_INTERFACE_MODE_MII: Media-independent interface
75 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
76 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
81 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
87 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
88 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
102 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
104 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
105 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII
138 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
142 /* 10GBASE-KR - with Clause 73 AN */
150 /* PHY interface mode bitmap handling */
185 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
189 * into the device tree binding of 'phy-mode', so that Ethernet
208 return "rev-mii"; in phy_modes()
212 return "rev-rmii"; in phy_modes()
216 return "rgmii-id"; in phy_modes()
218 return "rgmii-rxid"; in phy_modes()
220 return "rgmii-txid"; in phy_modes()
238 return "1000base-x"; in phy_modes()
240 return "1000base-kx"; in phy_modes()
242 return "2500base-x"; in phy_modes()
244 return "5gbase-r"; in phy_modes()
250 return "10gbase-r"; in phy_modes()
252 return "25gbase-r"; in phy_modes()
256 return "10gbase-kr"; in phy_modes()
258 return "100base-x"; in phy_modes()
262 return "10g-qxgmii"; in phy_modes()
269 * rgmii_clock - map link speed to the clock rate
270 * @speed: link speed value
277 static inline long rgmii_clock(int speed) in rgmii_clock() argument
279 switch (speed) { in rgmii_clock()
287 return -EINVAL; in rgmii_clock()
307 * struct mdio_bus_stats - Statistics counters for MDIO busses
324 * struct mii_bus - Represents an MDIO bus
406 * mdiobus_alloc - Allocate an MDIO bus structure
438 * enum phy_state - PHY state machine states:
443 * - PHY driver probe function will set the state to @PHY_READY
448 * - start will set the state to UP
452 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
455 * - irq or timer will set @PHY_RUNNING if link comes back
456 * - phy_stop moves to @PHY_HALTED
460 * - irq or timer will set @PHY_NOLINK if link goes down
461 * - phy_stop moves to @PHY_HALTED
467 * - phy_stop aborts the running test and moves to @PHY_HALTED
470 * - phy_start moves to @PHY_UP
473 * - phy_stop moves to @PHY_HALTED
489 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
504 * struct phy_device - An instance of a PHY
514 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
524 * @downshifted_rate: Set true if link speed has been downshifted.
527 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
530 * @dev_flags: Device-specific flags used by the PHY driver.
532 * - Bits [15:0] are free to use by the PHY driver to communicate
534 * - Bits [23:16] are currently reserved for future use.
535 * - Bits [31:24] are reserved for defining generic
537 * @irq: IRQ number of the PHY's interrupt (-1 if none)
547 * @speed: Current link speed
564 * @rate_matching: Current rate matching mode
579 * will switch between depending on media speed.
583 * @phy_led_triggers: Array of LED triggers
585 * @led_link_trigger: LED trigger for link up/down
586 * @last_triggered: last LED trigger for link speed
587 * @leds: list of PHY LED structures
655 * forced speed & duplex (no autoneg)
656 * partner speed & duplex & pause (autoneg)
658 int speed; member
697 * -1 means no interrupt
753 * struct phy_tdr_config - Configuration of a TDR raw test
771 #define PHY_PAIR_ALL -1
774 * enum link_inband_signalling - in-band signalling modes that are supported
776 * @LINK_INBAND_DISABLE: in-band signalling can be disabled
777 * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass
778 * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass
792 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
795 * @version: read-only PLCA register map version. -1 = not available. Ignored
797 * IDVER register (31.CA00). -1 = not available.
798 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
800 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
803 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
805 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
808 * -1 = not available / don't set. Allowed values [0 .. 255].
812 * per TO, and so on. -1 = not available / don't set.
816 * greater than the MAC inter-packet gap (which is typically 96 bits).
817 * -1 = not available / don't set. Allowed values [0 .. 255].
834 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
848 /* Modes for PHY LED configuration */
859 * struct phy_led: An LED driven by the PHY
862 * @phydev: PHY this LED is attached to
863 * @led_cdev: Standard LED class structure
864 * @index: Number of the LED
876 * struct phy_driver - Driver structure for a particular PHY type
884 * @features: A mandatory list of features (speed, duplex, etc)
920 * up device-specific structures, if any
926 * abilities it has. Should only set phydev->supported.
931 * @inband_caps: query whether in-band is supported for the given PHY
932 * interface mode. Returns a bitmask of bits defined by enum
939 * @config_inband: configure in-band mode for the PHY
946 * whether to advertise lower-speed modes for that interface. It is
947 * assumed that if a rate matching mode is supported on an interface,
963 * autonegotiation if phydev->autoneg is on,
964 * forces the speed to the current settings in phydev
965 * if phydev->autoneg is off
972 /** @read_status: Determines the negotiated speed and duplex */
996 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
1051 * within a plug-in module
1057 * @module_eeprom: Get the eeprom information from the plug-in
1081 * @stats: structure where additional PHY-specific stats will be stored.
1084 * structures. The input structures are pre-initialized with
1096 * @link_stats: structure where link-specific stats will be stored.
1098 * Retrieves link-related statistics for the given PHY device. The input
1099 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the
1112 * maintained 64-bit counters. This is necessary for PHYs that implement
1113 * reduced-width counters (e.g., 16-bit or 32-bit) which can overflow
1114 * more frequently compared to 64-bit counters. By invoking this
1116 * overflow detection, and accumulate the results into local 64-bit
1141 * @set_loopback: Set the loopback mode of the PHY
1142 * enable selects if the loopback mode is enabled or disabled. If the
1143 * loopback mode is enabled, then the speed of the loopback mode can be
1144 * requested with the speed argument. If the speed argument is zero,
1145 * then any speed can be selected. If the speed argument is > 0, then
1146 * this speed shall be selected for the loopback mode or EOPNOTSUPP
1147 * shall be returned if speed selection is not supported.
1149 int (*set_loopback)(struct phy_device *dev, bool enable, int speed);
1167 * @led_brightness_set: Set a PHY LED brightness. Index
1168 * indicates which of the PHYs led should be set. Value
1169 * follows the standard LED class meaning, e.g. LED_OFF,
1176 * @led_blink_set: Set a PHY LED blinking. Index indicates
1177 * which of the PHYs led should be configured to blink. Delays
1188 * @dev: PHY device which has the LED
1189 * @index: Which LED of the PHY device
1192 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1197 * @led_hw_control_set: Set the HW to control the LED
1198 * @dev: PHY device which has the LED
1199 * @index: Which LED of the PHY device
1200 * @rules The rules used to control the LED
1207 * @led_hw_control_get: Get how the HW is controlling the LED
1208 * @dev: PHY device which has the LED
1209 * @index: Which LED of the PHY device
1210 * @rules Pointer to the rules used to control the LED
1220 * @led_polarity_set: Set the LED polarity modes
1221 * @dev: PHY device which has the LED
1222 * @index: Which LED of the PHY device
1223 * @modes: bitmap of LED polarity modes
1225 * Configure LED with all the required polarity modes in @modes
1254 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1268 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1278 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask); in phydev_id_compare()
1281 const char *phy_speed_to_str(int speed);
1288 * phy_is_started - Convenience function to check whether PHY is started
1293 return phydev->state >= PHY_UP; in phy_is_started()
1297 * phy_disable_eee_mode - Don't advertise an EEE mode.
1299 * @link_mode: The EEE mode to be disabled
1305 linkmode_set_bit(link_mode, phydev->eee_disabled_modes); in phy_disable_eee_mode()
1306 linkmode_clear_bit(link_mode, phydev->advertising_eee); in phy_disable_eee_mode()
1313 * phy_read - Convenience function for reading a given PHY register
1323 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); in phy_read()
1341 * __phy_read - convenience function for reading a given PHY register
1349 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); in __phy_read()
1353 * phy_write - Convenience function for writing a given PHY register
1364 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); in phy_write()
1368 * __phy_write - Convenience function for writing a given PHY register
1377 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, in __phy_write()
1382 * __phy_modify_changed() - Convenience function for modifying a PHY register
1396 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, in __phy_modify_changed()
1401 * phy_read_mmd - Convenience function for reading a register
1407 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1415 * @sleep_us: Maximum time to sleep between reads in us (0 tight-loops). Please
1421 * Returns: 0 on success and -ETIMEDOUT upon a timeout. In either
1441 * __phy_read_mmd - Convenience function for reading a register
1447 * phy_write_mmd - Convenience function for writing a register
1453 * __phy_write_mmd - Convenience function for writing a register
1475 * __phy_set_bits - Convenience function for setting bits in a PHY register
1488 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1502 * phy_set_bits - Convenience function for setting bits in a PHY register
1513 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1524 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1540 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1556 * phy_set_bits_mmd - Convenience function for setting bits in a register
1570 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1584 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1592 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; in phy_interrupt_is_valid()
1596 * phy_polling_mode - Convenience function for testing whether polling is
1602 if (phydev->state == PHY_CABLETEST) in phy_polling_mode()
1603 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) in phy_polling_mode()
1606 if (phydev->drv->update_stats) in phy_polling_mode()
1609 return phydev->irq == PHY_POLL; in phy_polling_mode()
1613 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1618 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; in phy_has_hwtstamp()
1622 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1627 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; in phy_has_rxtstamp()
1631 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1637 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; in phy_has_tsinfo()
1641 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1646 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; in phy_has_txtstamp()
1653 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack); in phy_hwtstamp()
1659 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); in phy_rxtstamp()
1665 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); in phy_ts_info()
1671 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); in phy_txtstamp()
1675 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp
1686 return phy_has_hwtstamp(phydev) && phydev->default_timestamp; in phy_is_default_hwtstamp()
1690 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1695 return phydev->is_on_sfp_module; in phy_on_sfp()
1699 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1700 * PHY interface mode is RGMII (all variants)
1701 * @mode: the &phy_interface_t enum
1703 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) in phy_interface_mode_is_rgmii() argument
1705 return mode >= PHY_INTERFACE_MODE_RGMII && in phy_interface_mode_is_rgmii()
1706 mode <= PHY_INTERFACE_MODE_RGMII_TXID; in phy_interface_mode_is_rgmii()
1710 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1712 * @mode: one of &enum phy_interface_t
1714 * Returns true if the PHY interface mode uses the 16-bit negotiation
1715 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1717 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) in phy_interface_mode_is_8023z() argument
1719 return mode == PHY_INTERFACE_MODE_1000BASEX || in phy_interface_mode_is_8023z()
1720 mode == PHY_INTERFACE_MODE_2500BASEX; in phy_interface_mode_is_8023z()
1724 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1730 return phy_interface_mode_is_rgmii(phydev->interface); in phy_interface_is_rgmii()
1734 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1740 return phydev->is_pseudo_fixed_link; in phy_is_pseudo_fixed_link()
1812 int phy_loopback(struct phy_device *phydev, bool enable, int speed);
1843 bool phy_check_valid(int speed, int duplex, unsigned long *features);
1860 return -EOPNOTSUPP; in phy_start_cable_test()
1868 return -EOPNOTSUPP; in phy_start_cable_test_tdr()
1874 mdio_device_reset(&phydev->mdio, value); in phy_device_reset()
1878 dev_err(&_phydev->mdio.dev, format, ##args)
1881 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1884 dev_info(&_phydev->mdio.dev, format, ##args)
1887 dev_warn(&_phydev->mdio.dev, format, ##args)
1890 dev_dbg(&_phydev->mdio.dev, format, ##args)
1894 return dev_name(&phydev->mdio.dev); in phydev_name()
1899 mutex_lock(&phydev->mdio.bus->mdio_lock); in phy_lock_mdio_bus()
1904 mutex_unlock(&phydev->mdio.bus->mdio_lock); in phy_unlock_mdio_bus()
1927 int genphy_loopback(struct phy_device *phydev, bool enable, int speed);
1969 int genphy_c45_loopback(struct phy_device *phydev, bool enable, int speed);
1994 if (!phydev->drv) in phy_read_status()
1995 return -EIO; in phy_read_status()
1997 if (phydev->drv->read_status) in phy_read_status()
1998 return phydev->drv->read_status(phydev); in phy_read_status()
2126 * phy_module_driver() - Helper macro for registering PHY drivers