Lines Matching +full:non +full:- +full:armv7

1 /* SPDX-License-Identifier: GPL-2.0-only */
20  * The Armv7 and Armv8.8 or less CPU PMU supports up to 32 event counters.
44 	[0 ... PERF_COUNT_HW_MAX - 1] = HW_OP_UNSUPPORTED
47 [0 ... C(MAX) - 1] = {							\
48 	[0 ... C(OP_MAX) - 1] = {					\
49 		[0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED,	\
103 	 * Called by KVM to map the PMUv3 event space onto non-PMUv3 hardware.
107 	bool		secure_access; /* 32-bit ARM only */
112 	/* the attr_groups array must be NULL-terminated */
188 #define ARMV8_PMU_PDEV_NAME "armv8-pmu"
192 #define ARMV8_SPE_PDEV_NAME "arm,spe-v1"
197 	(lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi
209 	((((attr)->cfg) >> lo) & GENMASK_ULL(hi - lo, 0))