1171 struct dwc3 {  struct
1173 	struct dwc3_trb		*ep0_trb;  argument
1178 	struct dwc3_request	ep0_usb_req;  argument
1193 	struct dwc3_event_buffer *ev_buf;  argument
1194 	struct dwc3_ep		*eps[DWC3_ENDPOINTS_NUM];  argument
1196 	struct usb_gadget	*gadget;
1197 	struct usb_gadget_driver *gadget_driver;
1199 	struct clk		*bus_clk;
1200 	struct clk		*ref_clk;
1201 	struct clk		*susp_clk;
1202 	struct clk		*utmi_clk;
1203 	struct clk		*pipe_clk;
1205 	struct reset_control	*reset;
1207 	struct usb_phy		*usb2_phy;
1208 	struct usb_phy		*usb3_phy;
1210 	struct phy		*usb2_generic_phy[DWC3_USB2_MAX_PORTS];
1211 	struct phy		*usb3_generic_phy[DWC3_USB3_MAX_PORTS];
1213 	u8			num_usb2_ports;
1214 	u8			num_usb3_ports;
1216 	bool			phys_ready;
1218 	struct ulpi		*ulpi;
1219 	bool			ulpi_ready;
1221 	void __iomem		*regs;
1222 	size_t			regs_size;
1224 	enum usb_dr_mode	dr_mode;
1225 	u32			current_dr_role;
1226 	u32			desired_dr_role;
1227 	struct extcon_dev	*edev;
1228 	struct notifier_block	edev_nb;
1229 	enum usb_phy_interface	hsphy_mode;
1230 	struct usb_role_switch	*role_sw;
1231 	enum usb_dr_mode	role_switch_default_mode;
1233 	struct power_supply	*usb_psy;
1235 	u32			fladj;
1236 	u32			ref_clk_per;
1237 	u32			irq_gadget;
1238 	u32			otg_irq;
1239 	u32			current_otg_role;
1240 	u32			desired_otg_role;
1241 	bool			otg_restart_host;
1242 	u32			u1u2;
1243 	u32			maximum_speed;
1244 	u32			gadget_max_speed;
1245 	enum usb_ssp_rate	max_ssp_rate;
1246 	enum usb_ssp_rate	gadget_ssp_rate;
1248 	u32			ip;
1254 	u32			revision;
1304 	enum dwc3_ep0_next	ep0_next_event;  argument
1305 	enum dwc3_ep0_state	ep0state;  argument
1306 	enum dwc3_link_state	link_state;  argument
1317 	struct dwc3_hwparams	hwparams;  argument
1318 	struct debugfs_regset32	*regset;
1320 	u32			dbg_lsp_select;
1322 	u8			test_mode;
1323 	u8			test_mode_nr;
1324 	u8			lpm_nyet_threshold;
1325 	u8			hird_threshold;
1326 	u8			rx_thr_num_pkt;
1327 	u8			rx_max_burst;
1328 	u8			tx_thr_num_pkt;
1329 	u8			tx_max_burst;
1330 	u8			rx_thr_num_pkt_prd;
1331 	u8			rx_max_burst_prd;
1332 	u8			tx_thr_num_pkt_prd;
1333 	u8			tx_max_burst_prd;
1334 	u8			tx_fifo_resize_max_num;
1335 	u8			clear_stall_protocol;
1337 	const char		*hsphy_interface;
1339 	unsigned		connected:1;
1340 	unsigned		softconnect:1;
1341 	unsigned		delayed_status:1;
1342 	unsigned		ep0_bounced:1;
1343 	unsigned		ep0_expect_in:1;
1344 	unsigned		sysdev_is_parent:1;
1345 	unsigned		has_lpm_erratum:1;
1346 	unsigned		is_utmi_l1_suspend:1;
1347 	unsigned		is_fpga:1;
1348 	unsigned		pending_events:1;
1349 	unsigned		do_fifo_resize:1;
1350 	unsigned		pullups_connected:1;
1351 	unsigned		setup_packet_pending:1;
1352 	unsigned		three_stage_setup:1;
1353 	unsigned		dis_start_transfer_quirk:1;
1354 	unsigned		usb3_lpm_capable:1;
1355 	unsigned		usb2_lpm_disable:1;
1356 	unsigned		usb2_gadget_lpm_disable:1;
1358 	unsigned		disable_scramble_quirk:1;
1359 	unsigned		u2exit_lfps_quirk:1;
1360 	unsigned		u2ss_inp3_quirk:1;
1361 	unsigned		req_p1p2p3_quirk:1;
1362 	unsigned                del_p1p2p3_quirk:1;
1363 	unsigned		del_phy_power_chg_quirk:1;
1364 	unsigned		lfps_filter_quirk:1;
1365 	unsigned		rx_detect_poll_quirk:1;
1366 	unsigned		dis_u3_susphy_quirk:1;
1367 	unsigned		dis_u2_susphy_quirk:1;
1368 	unsigned		dis_enblslpm_quirk:1;
1369 	unsigned		dis_u1_entry_quirk:1;
1370 	unsigned		dis_u2_entry_quirk:1;
1371 	unsigned		dis_rxdet_inp3_quirk:1;
1372 	unsigned		dis_u2_freeclk_exists_quirk:1;
1373 	unsigned		dis_del_phy_power_chg_quirk:1;
1374 	unsigned		dis_tx_ipgap_linecheck_quirk:1;
1375 	unsigned		resume_hs_terminations:1;
1376 	unsigned		ulpi_ext_vbus_drv:1;
1377 	unsigned		parkmode_disable_ss_quirk:1;
1378 	unsigned		parkmode_disable_hs_quirk:1;
1379 	unsigned		gfladj_refclk_lpm_sel:1;
1381 	unsigned		tx_de_emphasis_quirk:1;
1382 	unsigned		tx_de_emphasis:2;
1406 #define work_to_dwc(w)		(container_of((w), struct dwc3, drd_work))  argument