278 	unsigned int		dmacr;		/* dma control reg */  member
551 	u16 dmacr;  in pl011_dma_tx_callback()  local
558 	dmacr = uap->dmacr;  in pl011_dma_tx_callback()
559 	uap->dmacr = dmacr & ~UART011_TXDMAE;  in pl011_dma_tx_callback()
560 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_callback()
569 	 * get further refills (hence we check dmacr).  in pl011_dma_tx_callback()
571 	if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) ||  in pl011_dma_tx_callback()
660 	uap->dmacr |= UART011_TXDMAE;  in pl011_dma_tx_refill()
661 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_refill()
695 		uap->dmacr |= UART011_TXDMAE;  in pl011_dma_tx_irq()
696 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_irq()
721 		uap->dmacr &= ~UART011_TXDMAE;  in pl011_dma_tx_stop()
722 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_stop()
736 	u16 dmacr;  in pl011_dma_tx_start()  local
752 		} else if (!(uap->dmacr & UART011_TXDMAE)) {  in pl011_dma_tx_start()
753 			uap->dmacr |= UART011_TXDMAE;  in pl011_dma_tx_start()
754 			pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_start()
763 	dmacr = uap->dmacr;  in pl011_dma_tx_start()
764 	uap->dmacr &= ~UART011_TXDMAE;  in pl011_dma_tx_start()
765 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_tx_start()
781 	uap->dmacr = dmacr;  in pl011_dma_tx_start()
782 	pl011_write(dmacr, uap, REG_DMACR);  in pl011_dma_tx_start()
807 		uap->dmacr &= ~UART011_TXDMAE;  in pl011_dma_flush_buffer()
808 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_flush_buffer()
847 	uap->dmacr |= UART011_RXDMAE;  in pl011_dma_rx_trigger_dma()
848 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_rx_trigger_dma()
954 	uap->dmacr &= ~UART011_RXDMAE;  in pl011_dma_rx_irq()
955 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_rx_irq()
1038 	uap->dmacr &= ~UART011_RXDMAE;  in pl011_dma_rx_stop()
1039 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_rx_stop()
1142 	uap->dmacr |= UART011_DMAONERR;  in pl011_dma_startup()
1143 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_startup()
1178 	uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE);  in pl011_dma_shutdown()
1179 	pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_dma_shutdown()
1886 		uap->dmacr |= UART011_RXDMAE;  in pl011_unthrottle_rx()
1887 		pl011_write(uap->dmacr, uap, REG_DMACR);  in pl011_unthrottle_rx()