Lines Matching full:spi_engine
140 struct spi_engine *spi_engine; member
145 struct spi_engine { struct
412 static bool spi_engine_write_cmd_fifo(struct spi_engine *spi_engine, in spi_engine_write_cmd_fifo() argument
415 void __iomem *addr = spi_engine->base + SPI_ENGINE_REG_CMD_FIFO; in spi_engine_write_cmd_fifo()
420 n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_CMD_FIFO_ROOM); in spi_engine_write_cmd_fifo()
434 static bool spi_engine_write_tx_fifo(struct spi_engine *spi_engine, in spi_engine_write_tx_fifo() argument
437 void __iomem *addr = spi_engine->base + SPI_ENGINE_REG_SDO_DATA_FIFO; in spi_engine_write_tx_fifo()
441 n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_SDO_FIFO_ROOM); in spi_engine_write_tx_fifo()
476 static bool spi_engine_read_rx_fifo(struct spi_engine *spi_engine, in spi_engine_read_rx_fifo() argument
479 void __iomem *addr = spi_engine->base + SPI_ENGINE_REG_SDI_DATA_FIFO; in spi_engine_read_rx_fifo()
483 n = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_SDI_FIFO_LEVEL); in spi_engine_read_rx_fifo()
522 struct spi_engine *spi_engine = spi_controller_get_devdata(host); in spi_engine_irq() local
527 pending = readl_relaxed(spi_engine->base + SPI_ENGINE_REG_INT_PENDING); in spi_engine_irq()
531 spi_engine->base + SPI_ENGINE_REG_INT_PENDING); in spi_engine_irq()
533 spi_engine->base + SPI_ENGINE_REG_SYNC_ID); in spi_engine_irq()
536 spin_lock(&spi_engine->lock); in spi_engine_irq()
539 if (!spi_engine_write_cmd_fifo(spi_engine, msg)) in spi_engine_irq()
544 if (!spi_engine_write_tx_fifo(spi_engine, msg)) in spi_engine_irq()
549 if (!spi_engine_read_rx_fifo(spi_engine, msg)) in spi_engine_irq()
557 complete(&spi_engine->msg_complete); in spi_engine_irq()
563 spi_engine->int_enable &= ~disable_int; in spi_engine_irq()
564 writel_relaxed(spi_engine->int_enable, in spi_engine_irq()
565 spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); in spi_engine_irq()
568 spin_unlock(&spi_engine->lock); in spi_engine_irq()
576 struct spi_engine *spi_engine = spi_controller_get_devdata(host); in spi_engine_offload_prepare() local
585 if (p->length > spi_engine->offload_ctrl_mem_size) in spi_engine_offload_prepare()
605 if (tx_word_count && !(spi_engine->offload_caps & SPI_OFFLOAD_CAP_TX_STATIC_DATA)) in spi_engine_offload_prepare()
608 if (tx_word_count > spi_engine->offload_sdo_mem_size) in spi_engine_offload_prepare()
618 cmd_addr = spi_engine->base + in spi_engine_offload_prepare()
620 sdo_addr = spi_engine->base + in spi_engine_offload_prepare()
654 struct spi_engine *spi_engine = priv->spi_engine; in spi_engine_offload_unprepare() local
656 writel_relaxed(1, spi_engine->base + in spi_engine_offload_unprepare()
658 writel_relaxed(0, spi_engine->base + in spi_engine_offload_unprepare()
714 struct spi_engine *spi_engine = spi_controller_get_devdata(host); in spi_engine_get_offload() local
717 if (!spi_engine->offload) in spi_engine_get_offload()
720 if (config->capability_flags & ~spi_engine->offload_caps) in spi_engine_get_offload()
723 priv = spi_engine->offload->priv; in spi_engine_get_offload()
728 return spi_engine->offload; in spi_engine_get_offload()
741 struct spi_engine *spi_engine = spi_controller_get_devdata(host); in spi_engine_setup() local
744 spi_engine->cs_inv |= BIT(spi_get_chipselect(device, 0)); in spi_engine_setup()
746 spi_engine->cs_inv &= ~BIT(spi_get_chipselect(device, 0)); in spi_engine_setup()
748 writel_relaxed(SPI_ENGINE_CMD_CS_INV(spi_engine->cs_inv), in spi_engine_setup()
749 spi_engine->base + SPI_ENGINE_REG_CMD_FIFO); in spi_engine_setup()
756 spi_engine->base + SPI_ENGINE_REG_CMD_FIFO); in spi_engine_setup()
764 struct spi_engine *spi_engine = spi_controller_get_devdata(host); in spi_engine_transfer_one_message() local
765 struct spi_engine_message_state *st = &spi_engine->msg_state; in spi_engine_transfer_one_message()
782 reinit_completion(&spi_engine->msg_complete); in spi_engine_transfer_one_message()
791 spin_lock_irqsave(&spi_engine->lock, flags); in spi_engine_transfer_one_message()
793 if (spi_engine_write_cmd_fifo(spi_engine, msg)) in spi_engine_transfer_one_message()
797 if (spi_engine_write_tx_fifo(spi_engine, msg)) in spi_engine_transfer_one_message()
807 spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); in spi_engine_transfer_one_message()
808 spi_engine->int_enable = int_enable; in spi_engine_transfer_one_message()
809 spin_unlock_irqrestore(&spi_engine->lock, flags); in spi_engine_transfer_one_message()
811 if (!wait_for_completion_timeout(&spi_engine->msg_complete, in spi_engine_transfer_one_message()
834 struct spi_engine *spi_engine = priv->spi_engine; in spi_engine_trigger_enable() local
837 reg = readl_relaxed(spi_engine->base + in spi_engine_trigger_enable()
840 writel_relaxed(reg, spi_engine->base + in spi_engine_trigger_enable()
848 struct spi_engine *spi_engine = priv->spi_engine; in spi_engine_trigger_disable() local
851 reg = readl_relaxed(spi_engine->base + in spi_engine_trigger_disable()
854 writel_relaxed(reg, spi_engine->base + in spi_engine_trigger_disable()
889 struct spi_engine *spi_engine = p; in spi_engine_release_hw() local
891 writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING); in spi_engine_release_hw()
892 writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); in spi_engine_release_hw()
893 writel_relaxed(0x01, spi_engine->base + SPI_ENGINE_REG_RESET); in spi_engine_release_hw()
898 struct spi_engine *spi_engine; in spi_engine_probe() local
907 host = devm_spi_alloc_host(&pdev->dev, sizeof(*spi_engine)); in spi_engine_probe()
911 spi_engine = spi_controller_get_devdata(host); in spi_engine_probe()
913 spin_lock_init(&spi_engine->lock); in spi_engine_probe()
914 init_completion(&spi_engine->msg_complete); in spi_engine_probe()
926 spi_engine->offload = in spi_engine_probe()
929 if (IS_ERR(spi_engine->offload)) in spi_engine_probe()
930 return PTR_ERR(spi_engine->offload); in spi_engine_probe()
932 priv = spi_engine->offload->priv; in spi_engine_probe()
933 priv->spi_engine = spi_engine; in spi_engine_probe()
936 spi_engine->offload->ops = &spi_engine_offload_ops; in spi_engine_probe()
937 spi_engine->offload_caps = SPI_OFFLOAD_CAP_TRIGGER; in spi_engine_probe()
940 spi_engine->offload_caps |= SPI_OFFLOAD_CAP_RX_STREAM_DMA; in spi_engine_probe()
941 spi_engine->offload->xfer_flags |= SPI_OFFLOAD_XFER_RX_STREAM; in spi_engine_probe()
945 spi_engine->offload_caps |= SPI_OFFLOAD_CAP_TX_STREAM_DMA; in spi_engine_probe()
946 spi_engine->offload->xfer_flags |= SPI_OFFLOAD_XFER_TX_STREAM; in spi_engine_probe()
952 spi_engine->offload_caps |= SPI_OFFLOAD_CAP_TX_STATIC_DATA; in spi_engine_probe()
956 spi_engine->clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk"); in spi_engine_probe()
957 if (IS_ERR(spi_engine->clk)) in spi_engine_probe()
958 return PTR_ERR(spi_engine->clk); in spi_engine_probe()
960 spi_engine->ref_clk = devm_clk_get_enabled(&pdev->dev, "spi_clk"); in spi_engine_probe()
961 if (IS_ERR(spi_engine->ref_clk)) in spi_engine_probe()
962 return PTR_ERR(spi_engine->ref_clk); in spi_engine_probe()
964 spi_engine->base = devm_platform_ioremap_resource(pdev, 0); in spi_engine_probe()
965 if (IS_ERR(spi_engine->base)) in spi_engine_probe()
966 return PTR_ERR(spi_engine->base); in spi_engine_probe()
968 version = readl(spi_engine->base + ADI_AXI_REG_VERSION); in spi_engine_probe()
978 unsigned int sizes = readl(spi_engine->base + in spi_engine_probe()
981 spi_engine->offload_ctrl_mem_size = 1 << in spi_engine_probe()
983 spi_engine->offload_sdo_mem_size = 1 << in spi_engine_probe()
986 spi_engine->offload_ctrl_mem_size = SPI_ENGINE_OFFLOAD_CMD_FIFO_SIZE; in spi_engine_probe()
987 spi_engine->offload_sdo_mem_size = SPI_ENGINE_OFFLOAD_SDO_FIFO_SIZE; in spi_engine_probe()
990 writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_RESET); in spi_engine_probe()
991 writel_relaxed(0xff, spi_engine->base + SPI_ENGINE_REG_INT_PENDING); in spi_engine_probe()
992 writel_relaxed(0x00, spi_engine->base + SPI_ENGINE_REG_INT_ENABLE); in spi_engine_probe()
995 spi_engine); in spi_engine_probe()
1007 host->max_speed_hz = clk_get_rate(spi_engine->ref_clk) / 2; in spi_engine_probe()