Lines Matching +full:11 +full:be
65 * be invalidated at a time, consider it before changing the value of
83 * hardware needs the async PDU buffers to be posted in multiples of 8
117 /* Must be 1 */
120 #define DB_EQ_RING_ID_HIGH_MASK 0x1F /* bits 11 - 15 */
121 #define DB_EQ_HIGH_SET_SHIFT 11
132 #define DB_CQ_RING_ID_HIGH_MASK 0x1F /* bits 11 - 15 */
133 #define DB_CQ_HIGH_SET_SHIFT 11
165 HWI_MEM_ASYNC_DATA_HANDLE_ULP0, /* 11 */
250 #include "be.h"
430 u8 rsvd0[2]; /* should be 0 */
558 * This has list of async PDUs that are waiting to be processed.
594 * When unsol PDU is in, it needs to be chained till all the bytes are
597 * on the conn_id it needs to be added to the correct async_entry wq.
605 * to be incremented
734 u8 sge0_len[17]; /* DWORD 11 */
735 u8 dif_meta_tag[14]; /* DWORD 11 */
736 u8 sge0_in_ddr; /* DWORD 11 */
769 u8 sge0_len[17]; /* DWORD 11 */
770 u8 rsvd3[7]; /* DWORD 11 */
771 u8 diff_enbl; /* DWORD 11 */
772 u8 u_run; /* DWORD 11 */
773 u8 o_run; /* DWORD 11 */
774 u8 invld; /* DWORD 11 */
775 u8 dsp; /* DWORD 11 */
776 u8 dmsg; /* DWORD 11 */
777 u8 rsvd4; /* DWORD 11 */
778 u8 lt; /* DWORD 11 */
815 u8 x_bit; /* reserved; should be 0 */
901 u8 rsvd6[32]; /* DWORD 11 */
938 u8 max_cxns[16]; /* DWORD 11 */
939 u8 rsvd12[11]; /* DWORD 11*/
940 u8 invld; /* DWORD 11 */
941 u8 rsvd13;/* DWORD 11*/
942 u8 dmsg; /* DWORD 11 */
943 u8 data_seq_inorder; /* DWORD 11 */
944 u8 pdu_seq_inorder; /* DWORD 11 */
965 * should be last to allow 32 & 64 bit debugger
983 HWH_TYPE_LOGIN = 11,
1000 * will be created for both ULP if iSCSI Protocol is