3  * Intel Low Power Subsystem PWM controller driver
22 #include <linux/pwm.h>
25 #include "pwm-lpss.h"
27 #define PWM				0x00000000  macro
33 /* Size of each PWM register space if multiple */
75 static inline u32 pwm_lpss_read(const struct pwm_device *pwm)  in pwm_lpss_read()  argument
77 	struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);  in pwm_lpss_read()
79 	return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);  in pwm_lpss_read()
82 static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)  in pwm_lpss_write()  argument
84 	struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);  in pwm_lpss_write()
86 	writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);  in pwm_lpss_write()
89 static int pwm_lpss_wait_for_update(struct pwm_device *pwm)  in pwm_lpss_wait_for_update()  argument
91 	struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);  in pwm_lpss_wait_for_update()
92 	const void __iomem *addr = lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM;  in pwm_lpss_wait_for_update()
98 	 * PWM Configuration register has SW_UPDATE bit that is set when a new  in pwm_lpss_wait_for_update()
103 	 * the bit enabled, PWM may freeze. That is, while one can still write  in pwm_lpss_wait_for_update()
110 		dev_err(pwmchip_parent(pwm->chip), "PWM_SW_UPDATE was not cleared\n");  in pwm_lpss_wait_for_update()
115 static inline int pwm_lpss_is_updating(struct pwm_device *pwm)  in pwm_lpss_is_updating()  argument
117 	if (pwm_lpss_read(pwm) & PWM_SW_UPDATE) {  in pwm_lpss_is_updating()
118 		dev_err(pwmchip_parent(pwm->chip), "PWM_SW_UPDATE is still set, skipping update\n");  in pwm_lpss_is_updating()
125 static void pwm_lpss_prepare(struct pwm_lpss_chip *lpwm, struct pwm_device *pwm,  in pwm_lpss_prepare()  argument
150 	ctrl = pwm_lpss_read(pwm);  in pwm_lpss_prepare()
156 	pwm_lpss_write(pwm, ctrl);  in pwm_lpss_prepare()
157 	pwm_lpss_write(pwm, ctrl | PWM_SW_UPDATE);  in pwm_lpss_prepare()
160 static inline void pwm_lpss_cond_enable(struct pwm_device *pwm, bool cond)  in pwm_lpss_cond_enable()  argument
163 		pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);  in pwm_lpss_cond_enable()
167 				   struct pwm_device *pwm,  in pwm_lpss_prepare_enable()  argument
172 	ret = pwm_lpss_is_updating(pwm);  in pwm_lpss_prepare_enable()
176 	pwm_lpss_prepare(lpwm, pwm, state->duty_cycle, state->period);  in pwm_lpss_prepare_enable()
177 	pwm_lpss_cond_enable(pwm, lpwm->info->bypass == false);  in pwm_lpss_prepare_enable()
178 	ret = pwm_lpss_wait_for_update(pwm);  in pwm_lpss_prepare_enable()
182 	pwm_lpss_cond_enable(pwm, lpwm->info->bypass == true);  in pwm_lpss_prepare_enable()
186 static int pwm_lpss_apply(struct pwm_chip *chip, struct pwm_device *pwm,  in pwm_lpss_apply()  argument
193 		if (!pwm_is_enabled(pwm)) {  in pwm_lpss_apply()
195 			ret = pwm_lpss_prepare_enable(lpwm, pwm, state);  in pwm_lpss_apply()
199 			ret = pwm_lpss_prepare_enable(lpwm, pwm, state);  in pwm_lpss_apply()
201 	} else if (pwm_is_enabled(pwm)) {  in pwm_lpss_apply()
202 		pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);  in pwm_lpss_apply()
209 static int pwm_lpss_get_state(struct pwm_chip *chip, struct pwm_device *pwm,  in pwm_lpss_get_state()  argument
221 	ctrl = pwm_lpss_read(pwm);  in pwm_lpss_get_state()
277 		dev_err(dev, "failed to add PWM chip: %d\n", ret);  in devm_pwm_lpss_probe()
291 MODULE_DESCRIPTION("PWM driver for Intel LPSS");