drivers/pinctrl/pinctrl-rockchip.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * Copyright (c) 2020-2024 Rockchip Electronics Co., Ltd.
8  * With some ideas taken from pinctrl-samsung:
14  * and pinctrl-at91:
15  * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
245  * @offset: if initialized to -1 it will be autocalculated, by specifying
278  * @offset: if initialized to -1 it will be autocalculated, by specifying
291  * @dev: the pinctrl device bind to the bank
292  * @reg_base: register base of the gpio bank
294  * @clk: clock of the gpio bank
296  * @irq: interrupt of the gpio bank
298  * @pin_base: first pin number
299  * @nr_pins: number of pins in this bank
300  * @name: name of the bank
301  * @bank_num: number of the bank, to account for holes
302  * @iomux: array describing the 4 iomux sources of the bank
303  * @drv: array describing the 4 drive strength sources of the bank
304  * @pull_type: array describing the 4 pull type sources of the bank
306  * @of_node: dt node of this bank
308  * @domain: irqdomain of the gpio bank
311  * @slock: spinlock for the gpio bank
314  * @route_mask: bits describing the routing pins of per bank
315  * @deferred_output: gpio output settings to be done after gpio bank probed
351  * @num: bank number.
352  * @pin: pin number.
373  * @bank_num: bank number.
404 	int	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
407 	int	(*drv_calc_reg)(struct rockchip_pin_bank *bank,
410 	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
434  * @npins: number of pins included in this group.
448  * @ngroups: number of groups included in @groups.