156 static const unsigned long enabled_socs =
173 static bool
181 static const u32 jz4730_pull_ups[4] = {
185 static const u32 jz4730_pull_downs[4] = {
189 static int jz4730_mmc_1bit_pins[] = { 0x27, 0x26, 0x22, };
190 static int jz4730_mmc_4bit_pins[] = { 0x23, 0x24, 0x25, };
191 static int jz4730_uart0_data_pins[] = { 0x7e, 0x7f, };
192 static int jz4730_uart1_data_pins[] = { 0x18, 0x19, };
193 static int jz4730_uart2_data_pins[] = { 0x6f, 0x7d, };
194 static int jz4730_uart3_data_pins[] = { 0x10, 0x15, };
195 static int jz4730_uart3_hwflow_pins[] = { 0x11, 0x17, };
196 static int jz4730_lcd_8bit_pins[] = {
200 static int jz4730_lcd_16bit_pins[] = {
203 static int jz4730_lcd_special_pins[] = { 0x3d, 0x3c, 0x3e, 0x3f, };
204 static int jz4730_lcd_generic_pins[] = { 0x3b, };
205 static int jz4730_nand_cs1_pins[] = { 0x53, };
206 static int jz4730_nand_cs2_pins[] = { 0x54, };
207 static int jz4730_nand_cs3_pins[] = { 0x55, };
208 static int jz4730_nand_cs4_pins[] = { 0x56, };
209 static int jz4730_nand_cs5_pins[] = { 0x57, };
210 static int jz4730_pwm_pwm0_pins[] = { 0x5e, };
211 static int jz4730_pwm_pwm1_pins[] = { 0x5f, };
213 static int jz4730_mii_pins[] = { 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76,
216 static int jz4730_i2s_mclk_pins[] = { 0x44, };
217 static int jz4730_i2s_acreset_pins[] = { 0x45, };
218 static int jz4730_i2s_data_pins[] = { 0x46, 0x47, };
219 static int jz4730_i2s_clock_pins[] = { 0x4d, 0x4e, };
221 static u8 jz4730_lcd_8bit_funcs[] = { 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, };
223 static const struct group_desc jz4730_groups[] = {
250 static const char *jz4730_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
251 static const char *jz4730_uart0_groups[] = { "uart0-data", };
252 static const char *jz4730_uart1_groups[] = { "uart1-data", };
253 static const char *jz4730_uart2_groups[] = { "uart2-data", };
254 static const char *jz4730_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
255 static const char *jz4730_lcd_groups[] = {
258 static const char *jz4730_nand_groups[] = {
261 static const char *jz4730_pwm0_groups[] = { "pwm0", };
262 static const char *jz4730_pwm1_groups[] = { "pwm1", };
263 static const char *jz4730_mii_groups[] = { "mii", };
264 static const char *jz4730_i2s_groups[] = { "i2s-data", "i2s-master", "i2s-slave", };
266 static const struct function_desc jz4730_functions[] = {
280 static const struct ingenic_chip_info jz4730_chip_info = {
292 static const u32 jz4740_pull_ups[4] = {
296 static const u32 jz4740_pull_downs[4] = {
300 static int jz4740_mmc_1bit_pins[] = { 0x69, 0x68, 0x6a, };
301 static int jz4740_mmc_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
302 static int jz4740_uart0_data_pins[] = { 0x7a, 0x79, };
303 static int jz4740_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
304 static int jz4740_uart1_data_pins[] = { 0x7e, 0x7f, };
305 static int jz4740_lcd_8bit_pins[] = {
309 static int jz4740_lcd_16bit_pins[] = {
312 static int jz4740_lcd_18bit_pins[] = { 0x50, 0x51, };
313 static int jz4740_lcd_special_pins[] = { 0x31, 0x32, 0x56, 0x57, };
314 static int jz4740_lcd_generic_pins[] = { 0x55, };
315 static int jz4740_nand_cs1_pins[] = { 0x39, };
316 static int jz4740_nand_cs2_pins[] = { 0x3a, };
317 static int jz4740_nand_cs3_pins[] = { 0x3b, };
318 static int jz4740_nand_cs4_pins[] = { 0x3c, };
319 static int jz4740_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
320 static int jz4740_pwm_pwm0_pins[] = { 0x77, };
321 static int jz4740_pwm_pwm1_pins[] = { 0x78, };
322 static int jz4740_pwm_pwm2_pins[] = { 0x79, };
323 static int jz4740_pwm_pwm3_pins[] = { 0x7a, };
324 static int jz4740_pwm_pwm4_pins[] = { 0x7b, };
325 static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
326 static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
327 static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
329 static const struct group_desc jz4740_groups[] = {
355 static const char *jz4740_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
356 static const char *jz4740_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
357 static const char *jz4740_uart1_groups[] = { "uart1-data", };
358 static const char *jz4740_lcd_groups[] = {
361 static const char *jz4740_nand_groups[] = {
364 static const char *jz4740_pwm0_groups[] = { "pwm0", };
365 static const char *jz4740_pwm1_groups[] = { "pwm1", };
366 static const char *jz4740_pwm2_groups[] = { "pwm2", };
367 static const char *jz4740_pwm3_groups[] = { "pwm3", };
368 static const char *jz4740_pwm4_groups[] = { "pwm4", };
369 static const char *jz4740_pwm5_groups[] = { "pwm5", };
370 static const char *jz4740_pwm6_groups[] = { "pwm6", };
371 static const char *jz4740_pwm7_groups[] = { "pwm7", };
373 static const struct function_desc jz4740_functions[] = {
389 static const struct ingenic_chip_info jz4740_chip_info = {
401 static int jz4725b_mmc0_1bit_pins[] = { 0x48, 0x49, 0x5c, };
402 static int jz4725b_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x56, };
403 static int jz4725b_mmc1_1bit_pins[] = { 0x7a, 0x7b, 0x7c, };
404 static int jz4725b_mmc1_4bit_pins[] = { 0x7d, 0x7e, 0x7f, };
405 static int jz4725b_uart_data_pins[] = { 0x4c, 0x4d, };
406 static int jz4725b_lcd_8bit_pins[] = {
410 static int jz4725b_lcd_16bit_pins[] = {
413 static int jz4725b_lcd_18bit_pins[] = { 0x70, 0x71, };
414 static int jz4725b_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, };
415 static int jz4725b_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
416 static int jz4725b_lcd_generic_pins[] = { 0x75, };
417 static int jz4725b_nand_cs1_pins[] = { 0x55, };
418 static int jz4725b_nand_cs2_pins[] = { 0x56, };
419 static int jz4725b_nand_cs3_pins[] = { 0x57, };
420 static int jz4725b_nand_cs4_pins[] = { 0x58, };
421 static int jz4725b_nand_cle_ale_pins[] = { 0x48, 0x49 };
422 static int jz4725b_nand_fre_fwe_pins[] = { 0x5c, 0x5d };
423 static int jz4725b_pwm_pwm0_pins[] = { 0x4a, };
424 static int jz4725b_pwm_pwm1_pins[] = { 0x4b, };
425 static int jz4725b_pwm_pwm2_pins[] = { 0x4c, };
426 static int jz4725b_pwm_pwm3_pins[] = { 0x4d, };
427 static int jz4725b_pwm_pwm4_pins[] = { 0x4e, };
428 static int jz4725b_pwm_pwm5_pins[] = { 0x4f, };
430 static u8 jz4725b_mmc0_4bit_funcs[] = { 1, 0, 1, };
432 static const struct group_desc jz4725b_groups[] = {
459 static const char *jz4725b_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
460 static const char *jz4725b_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
461 static const char *jz4725b_uart_groups[] = { "uart-data", };
462 static const char *jz4725b_lcd_groups[] = {
466 static const char *jz4725b_nand_groups[] = {
470 static const char *jz4725b_pwm0_groups[] = { "pwm0", };
471 static const char *jz4725b_pwm1_groups[] = { "pwm1", };
472 static const char *jz4725b_pwm2_groups[] = { "pwm2", };
473 static const char *jz4725b_pwm3_groups[] = { "pwm3", };
474 static const char *jz4725b_pwm4_groups[] = { "pwm4", };
475 static const char *jz4725b_pwm5_groups[] = { "pwm5", };
477 static const struct function_desc jz4725b_functions[] = {
491 static const struct ingenic_chip_info jz4725b_chip_info = {
503 static const u32 jz4750_pull_ups[6] = {
507 static const u32 jz4750_pull_downs[6] = {
511 static int jz4750_uart0_data_pins[] = { 0xa4, 0xa5, };
512 static int jz4750_uart0_hwflow_pins[] = { 0xa6, 0xa7, };
513 static int jz4750_uart1_data_pins[] = { 0x90, 0x91, };
514 static int jz4750_uart1_hwflow_pins[] = { 0x92, 0x93, };
515 static int jz4750_uart2_data_pins[] = { 0x9b, 0x9a, };
516 static int jz4750_uart3_data_pins[] = { 0xb0, 0xb1, };
517 static int jz4750_uart3_hwflow_pins[] = { 0xb2, 0xb3, };
518 static int jz4750_mmc0_1bit_pins[] = { 0xa8, 0xa9, 0xa0, };
519 static int jz4750_mmc0_4bit_pins[] = { 0xa1, 0xa2, 0xa3, };
520 static int jz4750_mmc0_8bit_pins[] = { 0xa4, 0xa5, 0xa6, 0xa7, };
521 static int jz4750_mmc1_1bit_pins[] = { 0xae, 0xaf, 0xaa, };
522 static int jz4750_mmc1_4bit_pins[] = { 0xab, 0xac, 0xad, };
523 static int jz4750_i2c_pins[] = { 0x8c, 0x8d, };
524 static int jz4750_cim_pins[] = {
528 static int jz4750_lcd_8bit_pins[] = {
532 static int jz4750_lcd_16bit_pins[] = {
535 static int jz4750_lcd_18bit_pins[] = { 0x70, 0x71, };
536 static int jz4750_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0xb2, 0xb3, };
537 static int jz4750_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
538 static int jz4750_lcd_generic_pins[] = { 0x75, };
539 static int jz4750_nand_cs1_pins[] = { 0x55, };
540 static int jz4750_nand_cs2_pins[] = { 0x56, };
541 static int jz4750_nand_cs3_pins[] = { 0x57, };
542 static int jz4750_nand_cs4_pins[] = { 0x58, };
543 static int jz4750_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
544 static int jz4750_pwm_pwm0_pins[] = { 0x94, };
545 static int jz4750_pwm_pwm1_pins[] = { 0x95, };
546 static int jz4750_pwm_pwm2_pins[] = { 0x96, };
547 static int jz4750_pwm_pwm3_pins[] = { 0x97, };
548 static int jz4750_pwm_pwm4_pins[] = { 0x98, };
549 static int jz4750_pwm_pwm5_pins[] = { 0x99, };
551 static const struct group_desc jz4750_groups[] = {
585 static const char *jz4750_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
586 static const char *jz4750_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
587 static const char *jz4750_uart2_groups[] = { "uart2-data", };
588 static const char *jz4750_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
589 static const char *jz4750_mmc0_groups[] = {
592 static const char *jz4750_mmc1_groups[] = { "mmc0-1bit", "mmc0-4bit", };
593 static const char *jz4750_i2c_groups[] = { "i2c-data", };
594 static const char *jz4750_cim_groups[] = { "cim-data", };
595 static const char *jz4750_lcd_groups[] = {
599 static const char *jz4750_nand_groups[] = {
602 static const char *jz4750_pwm0_groups[] = { "pwm0", };
603 static const char *jz4750_pwm1_groups[] = { "pwm1", };
604 static const char *jz4750_pwm2_groups[] = { "pwm2", };
605 static const char *jz4750_pwm3_groups[] = { "pwm3", };
606 static const char *jz4750_pwm4_groups[] = { "pwm4", };
607 static const char *jz4750_pwm5_groups[] = { "pwm5", };
609 static const struct function_desc jz4750_functions[] = {
628 static const struct ingenic_chip_info jz4750_chip_info = {
640 static const u32 jz4755_pull_ups[6] = {
644 static const u32 jz4755_pull_downs[6] = {
648 static int jz4755_uart0_data_pins[] = { 0x7c, 0x7d, };
649 static int jz4755_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
650 static int jz4755_uart1_data_pins[] = { 0x97, 0x99, };
651 static int jz4755_uart2_data_pins[] = { 0x9f, };
652 static int jz4755_ssi_dt_b_pins[] = { 0x3b, };
653 static int jz4755_ssi_dt_f_pins[] = { 0xa1, };
654 static int jz4755_ssi_dr_b_pins[] = { 0x3c, };
655 static int jz4755_ssi_dr_f_pins[] = { 0xa2, };
656 static int jz4755_ssi_clk_b_pins[] = { 0x3a, };
657 static int jz4755_ssi_clk_f_pins[] = { 0xa0, };
658 static int jz4755_ssi_gpc_b_pins[] = { 0x3e, };
659 static int jz4755_ssi_gpc_f_pins[] = { 0xa4, };
660 static int jz4755_ssi_ce0_b_pins[] = { 0x3d, };
661 static int jz4755_ssi_ce0_f_pins[] = { 0xa3, };
662 static int jz4755_ssi_ce1_b_pins[] = { 0x3f, };
663 static int jz4755_ssi_ce1_f_pins[] = { 0xa5, };
664 static int jz4755_mmc0_1bit_pins[] = { 0x2f, 0x50, 0x5c, };
665 static int jz4755_mmc0_4bit_pins[] = { 0x5d, 0x5b, 0x51, };
666 static int jz4755_mmc1_1bit_pins[] = { 0x3a, 0x3d, 0x3c, };
667 static int jz4755_mmc1_4bit_pins[] = { 0x3b, 0x3e, 0x3f, };
668 static int jz4755_i2c_pins[] = { 0x8c, 0x8d, };
669 static int jz4755_cim_pins[] = {
673 static int jz4755_lcd_8bit_pins[] = {
677 static int jz4755_lcd_16bit_pins[] = {
680 static int jz4755_lcd_18bit_pins[] = { 0x70, 0x71, };
681 static int jz4755_lcd_24bit_pins[] = { 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, };
682 static int jz4755_lcd_special_pins[] = { 0x76, 0x77, 0x78, 0x79, };
683 static int jz4755_lcd_generic_pins[] = { 0x75, };
684 static int jz4755_nand_cs1_pins[] = { 0x55, };
685 static int jz4755_nand_cs2_pins[] = { 0x56, };
686 static int jz4755_nand_cs3_pins[] = { 0x57, };
687 static int jz4755_nand_cs4_pins[] = { 0x58, };
688 static int jz4755_nand_fre_fwe_pins[] = { 0x5c, 0x5d, };
689 static int jz4755_pwm_pwm0_pins[] = { 0x94, };
690 static int jz4755_pwm_pwm1_pins[] = { 0xab, };
691 static int jz4755_pwm_pwm2_pins[] = { 0x96, };
692 static int jz4755_pwm_pwm3_pins[] = { 0x97, };
693 static int jz4755_pwm_pwm4_pins[] = { 0x98, };
694 static int jz4755_pwm_pwm5_pins[] = { 0x99, };
696 static u8 jz4755_mmc0_1bit_funcs[] = { 2, 2, 1, };
697 static u8 jz4755_mmc0_4bit_funcs[] = { 1, 0, 1, };
698 static u8 jz4755_lcd_24bit_funcs[] = { 1, 1, 1, 1, 0, 0, };
700 static const struct group_desc jz4755_groups[] = {
745 static const char *jz4755_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
746 static const char *jz4755_uart1_groups[] = { "uart1-data", };
747 static const char *jz4755_uart2_groups[] = { "uart2-data", };
748 static const char *jz4755_ssi_groups[] = {
756 static const char *jz4755_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
757 static const char *jz4755_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
758 static const char *jz4755_i2c_groups[] = { "i2c-data", };
759 static const char *jz4755_cim_groups[] = { "cim-data", };
760 static const char *jz4755_lcd_groups[] = {
764 static const char *jz4755_nand_groups[] = {
767 static const char *jz4755_pwm0_groups[] = { "pwm0", };
768 static const char *jz4755_pwm1_groups[] = { "pwm1", };
769 static const char *jz4755_pwm2_groups[] = { "pwm2", };
770 static const char *jz4755_pwm3_groups[] = { "pwm3", };
771 static const char *jz4755_pwm4_groups[] = { "pwm4", };
772 static const char *jz4755_pwm5_groups[] = { "pwm5", };
774 static const struct function_desc jz4755_functions[] = {
793 static const struct ingenic_chip_info jz4755_chip_info = {
805 static const u32 jz4760_pull_ups[6] = {
809 static const u32 jz4760_pull_downs[6] = {
813 static int jz4760_uart0_data_pins[] = { 0xa0, 0xa3, };
814 static int jz4760_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
815 static int jz4760_uart1_data_pins[] = { 0x7a, 0x7c, };
816 static int jz4760_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
817 static int jz4760_uart2_data_pins[] = { 0x5c, 0x5e, };
818 static int jz4760_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
819 static int jz4760_uart3_data_pins[] = { 0x6c, 0x85, };
820 static int jz4760_uart3_hwflow_pins[] = { 0x88, 0x89, };
821 static int jz4760_ssi0_dt_a_pins[] = { 0x15, };
822 static int jz4760_ssi0_dt_b_pins[] = { 0x35, };
823 static int jz4760_ssi0_dt_d_pins[] = { 0x75, };
824 static int jz4760_ssi0_dt_e_pins[] = { 0x91, };
825 static int jz4760_ssi0_dr_a_pins[] = { 0x14, };
826 static int jz4760_ssi0_dr_b_pins[] = { 0x34, };
827 static int jz4760_ssi0_dr_d_pins[] = { 0x74, };
828 static int jz4760_ssi0_dr_e_pins[] = { 0x8e, };
829 static int jz4760_ssi0_clk_a_pins[] = { 0x12, };
830 static int jz4760_ssi0_clk_b_pins[] = { 0x3c, };
831 static int jz4760_ssi0_clk_d_pins[] = { 0x78, };
832 static int jz4760_ssi0_clk_e_pins[] = { 0x8f, };
833 static int jz4760_ssi0_gpc_b_pins[] = { 0x3e, };
834 static int jz4760_ssi0_gpc_d_pins[] = { 0x76, };
835 static int jz4760_ssi0_gpc_e_pins[] = { 0x93, };
836 static int jz4760_ssi0_ce0_a_pins[] = { 0x13, };
837 static int jz4760_ssi0_ce0_b_pins[] = { 0x3d, };
838 static int jz4760_ssi0_ce0_d_pins[] = { 0x79, };
839 static int jz4760_ssi0_ce0_e_pins[] = { 0x90, };
840 static int jz4760_ssi0_ce1_b_pins[] = { 0x3f, };
841 static int jz4760_ssi0_ce1_d_pins[] = { 0x77, };
842 static int jz4760_ssi0_ce1_e_pins[] = { 0x92, };
843 static int jz4760_ssi1_dt_b_9_pins[] = { 0x29, };
844 static int jz4760_ssi1_dt_b_21_pins[] = { 0x35, };
845 static int jz4760_ssi1_dt_d_12_pins[] = { 0x6c, };
846 static int jz4760_ssi1_dt_d_21_pins[] = { 0x75, };
847 static int jz4760_ssi1_dt_e_pins[] = { 0x91, };
848 static int jz4760_ssi1_dt_f_pins[] = { 0xa3, };
849 static int jz4760_ssi1_dr_b_6_pins[] = { 0x26, };
850 static int jz4760_ssi1_dr_b_20_pins[] = { 0x34, };
851 static int jz4760_ssi1_dr_d_13_pins[] = { 0x6d, };
852 static int jz4760_ssi1_dr_d_20_pins[] = { 0x74, };
853 static int jz4760_ssi1_dr_e_pins[] = { 0x8e, };
854 static int jz4760_ssi1_dr_f_pins[] = { 0xa0, };
855 static int jz4760_ssi1_clk_b_7_pins[] = { 0x27, };
856 static int jz4760_ssi1_clk_b_28_pins[] = { 0x3c, };
857 static int jz4760_ssi1_clk_d_pins[] = { 0x78, };
858 static int jz4760_ssi1_clk_e_7_pins[] = { 0x87, };
859 static int jz4760_ssi1_clk_e_15_pins[] = { 0x8f, };
860 static int jz4760_ssi1_clk_f_pins[] = { 0xa2, };
861 static int jz4760_ssi1_gpc_b_pins[] = { 0x3e, };
862 static int jz4760_ssi1_gpc_d_pins[] = { 0x76, };
863 static int jz4760_ssi1_gpc_e_pins[] = { 0x93, };
864 static int jz4760_ssi1_ce0_b_8_pins[] = { 0x28, };
865 static int jz4760_ssi1_ce0_b_29_pins[] = { 0x3d, };
866 static int jz4760_ssi1_ce0_d_pins[] = { 0x79, };
867 static int jz4760_ssi1_ce0_e_6_pins[] = { 0x86, };
868 static int jz4760_ssi1_ce0_e_16_pins[] = { 0x90, };
869 static int jz4760_ssi1_ce0_f_pins[] = { 0xa1, };
870 static int jz4760_ssi1_ce1_b_pins[] = { 0x3f, };
871 static int jz4760_ssi1_ce1_d_pins[] = { 0x77, };
872 static int jz4760_ssi1_ce1_e_pins[] = { 0x92, };
873 static int jz4760_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
874 static int jz4760_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
875 static int jz4760_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
876 static int jz4760_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
877 static int jz4760_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
878 static int jz4760_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
879 static int jz4760_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
880 static int jz4760_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
881 static int jz4760_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
882 static int jz4760_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
883 static int jz4760_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
884 static int jz4760_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
885 static int jz4760_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
886 static int jz4760_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
887 static int jz4760_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
888 static int jz4760_nemc_8bit_data_pins[] = {
891 static int jz4760_nemc_16bit_data_pins[] = {
894 static int jz4760_nemc_cle_ale_pins[] = { 0x20, 0x21, };
895 static int jz4760_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
896 static int jz4760_nemc_rd_we_pins[] = { 0x10, 0x11, };
897 static int jz4760_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
898 static int jz4760_nemc_wait_pins[] = { 0x1b, };
899 static int jz4760_nemc_cs1_pins[] = { 0x15, };
900 static int jz4760_nemc_cs2_pins[] = { 0x16, };
901 static int jz4760_nemc_cs3_pins[] = { 0x17, };
902 static int jz4760_nemc_cs4_pins[] = { 0x18, };
903 static int jz4760_nemc_cs5_pins[] = { 0x19, };
904 static int jz4760_nemc_cs6_pins[] = { 0x1a, };
905 static int jz4760_i2c0_pins[] = { 0x7e, 0x7f, };
906 static int jz4760_i2c1_pins[] = { 0x9e, 0x9f, };
907 static int jz4760_cim_pins[] = {
911 static int jz4760_lcd_8bit_pins[] = {
915 static int jz4760_lcd_16bit_pins[] = {
918 static int jz4760_lcd_18bit_pins[] = {
921 static int jz4760_lcd_24bit_pins[] = {
924 static int jz4760_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
925 static int jz4760_lcd_generic_pins[] = { 0x49, };
926 static int jz4760_pwm_pwm0_pins[] = { 0x80, };
927 static int jz4760_pwm_pwm1_pins[] = { 0x81, };
928 static int jz4760_pwm_pwm2_pins[] = { 0x82, };
929 static int jz4760_pwm_pwm3_pins[] = { 0x83, };
930 static int jz4760_pwm_pwm4_pins[] = { 0x84, };
931 static int jz4760_pwm_pwm5_pins[] = { 0x85, };
932 static int jz4760_pwm_pwm6_pins[] = { 0x6a, };
933 static int jz4760_pwm_pwm7_pins[] = { 0x6b, };
934 static int jz4760_otg_pins[] = { 0x8a, };
936 static u8 jz4760_uart3_data_funcs[] = { 0, 1, };
937 static u8 jz4760_mmc0_1bit_a_funcs[] = { 1, 1, 0, };
939 static const struct group_desc jz4760_groups[] = {
1050 static const char *jz4760_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1051 static const char *jz4760_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1052 static const char *jz4760_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1053 static const char *jz4760_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1054 static const char *jz4760_ssi0_groups[] = {
1062 static const char *jz4760_ssi1_groups[] = {
1070 static const char *jz4760_mmc0_groups[] = {
1074 static const char *jz4760_mmc1_groups[] = {
1078 static const char *jz4760_mmc2_groups[] = {
1082 static const char *jz4760_nemc_groups[] = {
1086 static const char *jz4760_cs1_groups[] = { "nemc-cs1", };
1087 static const char *jz4760_cs2_groups[] = { "nemc-cs2", };
1088 static const char *jz4760_cs3_groups[] = { "nemc-cs3", };
1089 static const char *jz4760_cs4_groups[] = { "nemc-cs4", };
1090 static const char *jz4760_cs5_groups[] = { "nemc-cs5", };
1091 static const char *jz4760_cs6_groups[] = { "nemc-cs6", };
1092 static const char *jz4760_i2c0_groups[] = { "i2c0-data", };
1093 static const char *jz4760_i2c1_groups[] = { "i2c1-data", };
1094 static const char *jz4760_cim_groups[] = { "cim-data", };
1095 static const char *jz4760_lcd_groups[] = {
1099 static const char *jz4760_pwm0_groups[] = { "pwm0", };
1100 static const char *jz4760_pwm1_groups[] = { "pwm1", };
1101 static const char *jz4760_pwm2_groups[] = { "pwm2", };
1102 static const char *jz4760_pwm3_groups[] = { "pwm3", };
1103 static const char *jz4760_pwm4_groups[] = { "pwm4", };
1104 static const char *jz4760_pwm5_groups[] = { "pwm5", };
1105 static const char *jz4760_pwm6_groups[] = { "pwm6", };
1106 static const char *jz4760_pwm7_groups[] = { "pwm7", };
1107 static const char *jz4760_otg_groups[] = { "otg-vbus", };
1109 static const struct function_desc jz4760_functions[] = {
1141 static const struct ingenic_chip_info jz4760_chip_info = {
1153 static const u32 jz4770_pull_ups[6] = {
1157 static const u32 jz4770_pull_downs[6] = {
1161 static int jz4770_uart0_data_pins[] = { 0xa0, 0xa3, };
1162 static int jz4770_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1163 static int jz4770_uart1_data_pins[] = { 0x7a, 0x7c, };
1164 static int jz4770_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1165 static int jz4770_uart2_data_pins[] = { 0x5c, 0x5e, };
1166 static int jz4770_uart2_hwflow_pins[] = { 0x5d, 0x5f, };
1167 static int jz4770_uart3_data_pins[] = { 0x6c, 0x85, };
1168 static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, };
1169 static int jz4770_ssi0_dt_a_pins[] = { 0x15, };
1170 static int jz4770_ssi0_dt_b_pins[] = { 0x35, };
1171 static int jz4770_ssi0_dt_d_pins[] = { 0x75, };
1172 static int jz4770_ssi0_dt_e_pins[] = { 0x91, };
1173 static int jz4770_ssi0_dr_a_pins[] = { 0x14, };
1174 static int jz4770_ssi0_dr_b_pins[] = { 0x34, };
1175 static int jz4770_ssi0_dr_d_pins[] = { 0x74, };
1176 static int jz4770_ssi0_dr_e_pins[] = { 0x8e, };
1177 static int jz4770_ssi0_clk_a_pins[] = { 0x12, };
1178 static int jz4770_ssi0_clk_b_pins[] = { 0x3c, };
1179 static int jz4770_ssi0_clk_d_pins[] = { 0x78, };
1180 static int jz4770_ssi0_clk_e_pins[] = { 0x8f, };
1181 static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, };
1182 static int jz4770_ssi0_gpc_d_pins[] = { 0x76, };
1183 static int jz4770_ssi0_gpc_e_pins[] = { 0x93, };
1184 static int jz4770_ssi0_ce0_a_pins[] = { 0x13, };
1185 static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, };
1186 static int jz4770_ssi0_ce0_d_pins[] = { 0x79, };
1187 static int jz4770_ssi0_ce0_e_pins[] = { 0x90, };
1188 static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, };
1189 static int jz4770_ssi0_ce1_d_pins[] = { 0x77, };
1190 static int jz4770_ssi0_ce1_e_pins[] = { 0x92, };
1191 static int jz4770_ssi1_dt_b_pins[] = { 0x35, };
1192 static int jz4770_ssi1_dt_d_pins[] = { 0x75, };
1193 static int jz4770_ssi1_dt_e_pins[] = { 0x91, };
1194 static int jz4770_ssi1_dr_b_pins[] = { 0x34, };
1195 static int jz4770_ssi1_dr_d_pins[] = { 0x74, };
1196 static int jz4770_ssi1_dr_e_pins[] = { 0x8e, };
1197 static int jz4770_ssi1_clk_b_pins[] = { 0x3c, };
1198 static int jz4770_ssi1_clk_d_pins[] = { 0x78, };
1199 static int jz4770_ssi1_clk_e_pins[] = { 0x8f, };
1200 static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, };
1201 static int jz4770_ssi1_gpc_d_pins[] = { 0x76, };
1202 static int jz4770_ssi1_gpc_e_pins[] = { 0x93, };
1203 static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, };
1204 static int jz4770_ssi1_ce0_d_pins[] = { 0x79, };
1205 static int jz4770_ssi1_ce0_e_pins[] = { 0x90, };
1206 static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, };
1207 static int jz4770_ssi1_ce1_d_pins[] = { 0x77, };
1208 static int jz4770_ssi1_ce1_e_pins[] = { 0x92, };
1209 static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1210 static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1211 static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1212 static int jz4770_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1213 static int jz4770_mmc0_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1214 static int jz4770_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1215 static int jz4770_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1216 static int jz4770_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1217 static int jz4770_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1218 static int jz4770_mmc1_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1219 static int jz4770_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1220 static int jz4770_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1221 static int jz4770_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1222 static int jz4770_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1223 static int jz4770_mmc2_8bit_e_pins[] = { 0x98, 0x99, 0x9a, 0x9b, };
1224 static int jz4770_nemc_8bit_data_pins[] = {
1227 static int jz4770_nemc_16bit_data_pins[] = {
1230 static int jz4770_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1231 static int jz4770_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1232 static int jz4770_nemc_rd_we_pins[] = { 0x10, 0x11, };
1233 static int jz4770_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1234 static int jz4770_nemc_wait_pins[] = { 0x1b, };
1235 static int jz4770_nemc_cs1_pins[] = { 0x15, };
1236 static int jz4770_nemc_cs2_pins[] = { 0x16, };
1237 static int jz4770_nemc_cs3_pins[] = { 0x17, };
1238 static int jz4770_nemc_cs4_pins[] = { 0x18, };
1239 static int jz4770_nemc_cs5_pins[] = { 0x19, };
1240 static int jz4770_nemc_cs6_pins[] = { 0x1a, };
1241 static int jz4770_i2c0_pins[] = { 0x7e, 0x7f, };
1242 static int jz4770_i2c1_pins[] = { 0x9e, 0x9f, };
1243 static int jz4770_i2c2_pins[] = { 0xb0, 0xb1, };
1244 static int jz4770_cim_8bit_pins[] = {
1248 static int jz4770_cim_12bit_pins[] = {
1251 static int jz4770_lcd_8bit_pins[] = {
1255 static int jz4770_lcd_16bit_pins[] = {
1258 static int jz4770_lcd_18bit_pins[] = {
1261 static int jz4770_lcd_24bit_pins[] = {
1267 static int jz4770_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1268 static int jz4770_lcd_generic_pins[] = { 0x49, };
1269 static int jz4770_pwm_pwm0_pins[] = { 0x80, };
1270 static int jz4770_pwm_pwm1_pins[] = { 0x81, };
1271 static int jz4770_pwm_pwm2_pins[] = { 0x82, };
1272 static int jz4770_pwm_pwm3_pins[] = { 0x83, };
1273 static int jz4770_pwm_pwm4_pins[] = { 0x84, };
1274 static int jz4770_pwm_pwm5_pins[] = { 0x85, };
1275 static int jz4770_pwm_pwm6_pins[] = { 0x6a, };
1276 static int jz4770_pwm_pwm7_pins[] = { 0x6b, };
1277 static int jz4770_mac_rmii_pins[] = {
1280 static int jz4770_mac_mii_pins[] = {
1284 static const struct group_desc jz4770_groups[] = {
1387 static const char *jz4770_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1388 static const char *jz4770_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1389 static const char *jz4770_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1390 static const char *jz4770_uart3_groups[] = { "uart3-data", "uart3-hwflow", };
1391 static const char *jz4770_ssi0_groups[] = {
1399 static const char *jz4770_ssi1_groups[] = {
1407 static const char *jz4770_mmc0_groups[] = {
1411 static const char *jz4770_mmc1_groups[] = {
1415 static const char *jz4770_mmc2_groups[] = {
1419 static const char *jz4770_nemc_groups[] = {
1423 static const char *jz4770_cs1_groups[] = { "nemc-cs1", };
1424 static const char *jz4770_cs2_groups[] = { "nemc-cs2", };
1425 static const char *jz4770_cs3_groups[] = { "nemc-cs3", };
1426 static const char *jz4770_cs4_groups[] = { "nemc-cs4", };
1427 static const char *jz4770_cs5_groups[] = { "nemc-cs5", };
1428 static const char *jz4770_cs6_groups[] = { "nemc-cs6", };
1429 static const char *jz4770_i2c0_groups[] = { "i2c0-data", };
1430 static const char *jz4770_i2c1_groups[] = { "i2c1-data", };
1431 static const char *jz4770_i2c2_groups[] = { "i2c2-data", };
1432 static const char *jz4770_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
1433 static const char *jz4770_lcd_groups[] = {
1437 static const char *jz4770_pwm0_groups[] = { "pwm0", };
1438 static const char *jz4770_pwm1_groups[] = { "pwm1", };
1439 static const char *jz4770_pwm2_groups[] = { "pwm2", };
1440 static const char *jz4770_pwm3_groups[] = { "pwm3", };
1441 static const char *jz4770_pwm4_groups[] = { "pwm4", };
1442 static const char *jz4770_pwm5_groups[] = { "pwm5", };
1443 static const char *jz4770_pwm6_groups[] = { "pwm6", };
1444 static const char *jz4770_pwm7_groups[] = { "pwm7", };
1445 static const char *jz4770_mac_groups[] = { "mac-rmii", "mac-mii", };
1447 static const struct function_desc jz4770_functions[] = {
1481 static const struct ingenic_chip_info jz4770_chip_info = {
1493 static const u32 jz4775_pull_ups[7] = {
1497 static const u32 jz4775_pull_downs[7] = {
1501 static int jz4775_uart0_data_pins[] = { 0xa0, 0xa3, };
1502 static int jz4775_uart0_hwflow_pins[] = { 0xa1, 0xa2, };
1503 static int jz4775_uart1_data_pins[] = { 0x7a, 0x7c, };
1504 static int jz4775_uart1_hwflow_pins[] = { 0x7b, 0x7d, };
1505 static int jz4775_uart2_data_c_pins[] = { 0x54, 0x4a, };
1506 static int jz4775_uart2_data_f_pins[] = { 0xa5, 0xa4, };
1507 static int jz4775_uart3_data_pins[] = { 0x1e, 0x1f, };
1508 static int jz4775_ssi_dt_a_pins[] = { 0x13, };
1509 static int jz4775_ssi_dt_d_pins[] = { 0x75, };
1510 static int jz4775_ssi_dr_a_pins[] = { 0x14, };
1511 static int jz4775_ssi_dr_d_pins[] = { 0x74, };
1512 static int jz4775_ssi_clk_a_pins[] = { 0x12, };
1513 static int jz4775_ssi_clk_d_pins[] = { 0x78, };
1514 static int jz4775_ssi_gpc_pins[] = { 0x76, };
1515 static int jz4775_ssi_ce0_a_pins[] = { 0x17, };
1516 static int jz4775_ssi_ce0_d_pins[] = { 0x79, };
1517 static int jz4775_ssi_ce1_pins[] = { 0x77, };
1518 static int jz4775_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, };
1519 static int jz4775_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, };
1520 static int jz4775_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, };
1521 static int jz4775_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1522 static int jz4775_mmc0_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1523 static int jz4775_mmc1_1bit_d_pins[] = { 0x78, 0x79, 0x74, };
1524 static int jz4775_mmc1_4bit_d_pins[] = { 0x75, 0x76, 0x77, };
1525 static int jz4775_mmc1_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1526 static int jz4775_mmc1_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1527 static int jz4775_mmc2_1bit_b_pins[] = { 0x3c, 0x3d, 0x34, };
1528 static int jz4775_mmc2_4bit_b_pins[] = { 0x35, 0x3e, 0x3f, };
1529 static int jz4775_mmc2_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, };
1530 static int jz4775_mmc2_4bit_e_pins[] = { 0x95, 0x96, 0x97, };
1531 static int jz4775_nemc_8bit_data_pins[] = {
1534 static int jz4775_nemc_16bit_data_pins[] = {
1537 static int jz4775_nemc_cle_ale_pins[] = { 0x20, 0x21, };
1538 static int jz4775_nemc_addr_pins[] = { 0x22, 0x23, 0x24, 0x25, };
1539 static int jz4775_nemc_rd_we_pins[] = { 0x10, 0x11, };
1540 static int jz4775_nemc_frd_fwe_pins[] = { 0x12, 0x13, };
1541 static int jz4775_nemc_wait_pins[] = { 0x1b, };
1542 static int jz4775_nemc_cs1_pins[] = { 0x15, };
1543 static int jz4775_nemc_cs2_pins[] = { 0x16, };
1544 static int jz4775_nemc_cs3_pins[] = { 0x17, };
1545 static int jz4775_i2c0_pins[] = { 0x7e, 0x7f, };
1546 static int jz4775_i2c1_pins[] = { 0x9e, 0x9f, };
1547 static int jz4775_i2c2_pins[] = { 0x80, 0x83, };
1548 static int jz4775_i2s_data_tx_pins[] = { 0xa3, };
1549 static int jz4775_i2s_data_rx_pins[] = { 0xa2, };
1550 static int jz4775_i2s_clk_txrx_pins[] = { 0xa0, 0xa1, };
1551 static int jz4775_i2s_sysclk_pins[] = { 0x83, };
1552 static int jz4775_dmic_pins[] = { 0xaa, 0xab, };
1553 static int jz4775_cim_pins[] = {
1557 static int jz4775_lcd_8bit_pins[] = {
1561 static int jz4775_lcd_16bit_pins[] = {
1564 static int jz4775_lcd_18bit_pins[] = {
1567 static int jz4775_lcd_24bit_pins[] = {
1570 static int jz4775_lcd_special_pins[] = { 0x54, 0x4a, 0x41, 0x40, };
1571 static int jz4775_lcd_generic_pins[] = { 0x49, };
1572 static int jz4775_pwm_pwm0_pins[] = { 0x80, };
1573 static int jz4775_pwm_pwm1_pins[] = { 0x81, };
1574 static int jz4775_pwm_pwm2_pins[] = { 0x82, };
1575 static int jz4775_pwm_pwm3_pins[] = { 0x83, };
1576 static int jz4775_mac_rmii_pins[] = {
1579 static int jz4775_mac_mii_pins[] = {
1582 static int jz4775_mac_rgmii_pins[] = {
1586 static int jz4775_mac_gmii_pins[] = {
1590 static int jz4775_otg_pins[] = { 0x8a, };
1592 static u8 jz4775_uart3_data_funcs[] = { 0, 1, };
1593 static u8 jz4775_mac_mii_funcs[] = { 1, 1, 1, 1, 0, 1, 0, };
1594 static u8 jz4775_mac_rgmii_funcs[] = {
1598 static u8 jz4775_mac_gmii_funcs[] = {
1603 static const struct group_desc jz4775_groups[] = {
1674 static const char *jz4775_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
1675 static const char *jz4775_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
1676 static const char *jz4775_uart2_groups[] = { "uart2-data-c", "uart2-data-f", };
1677 static const char *jz4775_uart3_groups[] = { "uart3-data", };
1678 static const char *jz4775_ssi_groups[] = {
1686 static const char *jz4775_mmc0_groups[] = {
1690 static const char *jz4775_mmc1_groups[] = {
1694 static const char *jz4775_mmc2_groups[] = {
1698 static const char *jz4775_nemc_groups[] = {
1702 static const char *jz4775_cs1_groups[] = { "nemc-cs1", };
1703 static const char *jz4775_cs2_groups[] = { "nemc-cs2", };
1704 static const char *jz4775_cs3_groups[] = { "nemc-cs3", };
1705 static const char *jz4775_i2c0_groups[] = { "i2c0-data", };
1706 static const char *jz4775_i2c1_groups[] = { "i2c1-data", };
1707 static const char *jz4775_i2c2_groups[] = { "i2c2-data", };
1708 static const char *jz4775_i2s_groups[] = {
1711 static const char *jz4775_dmic_groups[] = { "dmic", };
1712 static const char *jz4775_cim_groups[] = { "cim-data", };
1713 static const char *jz4775_lcd_groups[] = {
1717 static const char *jz4775_pwm0_groups[] = { "pwm0", };
1718 static const char *jz4775_pwm1_groups[] = { "pwm1", };
1719 static const char *jz4775_pwm2_groups[] = { "pwm2", };
1720 static const char *jz4775_pwm3_groups[] = { "pwm3", };
1721 static const char *jz4775_mac_groups[] = {
1724 static const char *jz4775_otg_groups[] = { "otg-vbus", };
1726 static const struct function_desc jz4775_functions[] = {
1754 static const struct ingenic_chip_info jz4775_chip_info = {
1766 static const u32 jz4780_pull_ups[6] = {
1770 static const u32 jz4780_pull_downs[6] = {
1774 static int jz4780_uart2_data_pins[] = { 0x66, 0x67, };
1775 static int jz4780_uart2_hwflow_pins[] = { 0x65, 0x64, };
1776 static int jz4780_uart4_data_pins[] = { 0x54, 0x4a, };
1777 static int jz4780_ssi0_dt_a_19_pins[] = { 0x13, };
1778 static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, };
1779 static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, };
1780 static int jz4780_ssi0_dt_b_pins[] = { 0x3d, };
1781 static int jz4780_ssi0_dt_d_pins[] = { 0x79, };
1782 static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, };
1783 static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, };
1784 static int jz4780_ssi0_dr_b_pins[] = { 0x34, };
1785 static int jz4780_ssi0_dr_d_pins[] = { 0x74, };
1786 static int jz4780_ssi0_clk_a_pins[] = { 0x12, };
1787 static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, };
1788 static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, };
1789 static int jz4780_ssi0_clk_d_pins[] = { 0x78, };
1790 static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, };
1791 static int jz4780_ssi0_gpc_d_pins[] = { 0x76, };
1792 static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, };
1793 static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, };
1794 static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, };
1795 static int jz4780_ssi0_ce0_d_pins[] = { 0x77, };
1796 static int jz4780_ssi0_ce1_b_pins[] = { 0x35, };
1797 static int jz4780_ssi0_ce1_d_pins[] = { 0x75, };
1798 static int jz4780_ssi1_dt_b_pins[] = { 0x3d, };
1799 static int jz4780_ssi1_dt_d_pins[] = { 0x79, };
1800 static int jz4780_ssi1_dr_b_pins[] = { 0x34, };
1801 static int jz4780_ssi1_dr_d_pins[] = { 0x74, };
1802 static int jz4780_ssi1_clk_b_pins[] = { 0x3c, };
1803 static int jz4780_ssi1_clk_d_pins[] = { 0x78, };
1804 static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, };
1805 static int jz4780_ssi1_gpc_d_pins[] = { 0x76, };
1806 static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, };
1807 static int jz4780_ssi1_ce0_d_pins[] = { 0x77, };
1808 static int jz4780_ssi1_ce1_b_pins[] = { 0x35, };
1809 static int jz4780_ssi1_ce1_d_pins[] = { 0x75, };
1810 static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, };
1811 static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, };
1812 static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
1813 static int jz4780_i2c4_f_pins[] = { 0xb9, 0xb8, };
1814 static int jz4780_i2s_data_tx_pins[] = { 0x87, };
1815 static int jz4780_i2s_data_rx_pins[] = { 0x86, };
1816 static int jz4780_i2s_clk_txrx_pins[] = { 0x6c, 0x6d, };
1817 static int jz4780_i2s_clk_rx_pins[] = { 0x88, 0x89, };
1818 static int jz4780_i2s_sysclk_pins[] = { 0x85, };
1819 static int jz4780_dmic_pins[] = { 0x32, 0x33, };
1820 static int jz4780_hdmi_ddc_pins[] = { 0xb9, 0xb8, };
1822 static u8 jz4780_i2s_clk_txrx_funcs[] = { 1, 0, };
1824 static const struct group_desc jz4780_groups[] = {
1938 static const char *jz4780_uart2_groups[] = { "uart2-data", "uart2-hwflow", };
1939 static const char *jz4780_uart4_groups[] = { "uart4-data", };
1940 static const char *jz4780_ssi0_groups[] = {
1948 static const char *jz4780_ssi1_groups[] = {
1956 static const char *jz4780_mmc0_groups[] = {
1960 static const char *jz4780_mmc1_groups[] = {
1963 static const char *jz4780_mmc2_groups[] = {
1966 static const char *jz4780_nemc_groups[] = {
1970 static const char *jz4780_i2c3_groups[] = { "i2c3-data", };
1971 static const char *jz4780_i2c4_groups[] = { "i2c4-data-e", "i2c4-data-f", };
1972 static const char *jz4780_i2s_groups[] = {
1975 static const char *jz4780_dmic_groups[] = { "dmic", };
1976 static const char *jz4780_cim_groups[] = { "cim-data", };
1977 static const char *jz4780_hdmi_ddc_groups[] = { "hdmi-ddc", };
1979 static const struct function_desc jz4780_functions[] = {
2017 static const struct ingenic_chip_info jz4780_chip_info = {
2029 static const u32 x1000_pull_ups[4] = {
2033 static const u32 x1000_pull_downs[4] = {
2037 static int x1000_uart0_data_pins[] = { 0x4a, 0x4b, };
2038 static int x1000_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2039 static int x1000_uart1_data_a_pins[] = { 0x04, 0x05, };
2040 static int x1000_uart1_data_d_pins[] = { 0x62, 0x63, };
2041 static int x1000_uart1_hwflow_pins[] = { 0x64, 0x65, };
2042 static int x1000_uart2_data_a_pins[] = { 0x02, 0x03, };
2043 static int x1000_uart2_data_d_pins[] = { 0x65, 0x64, };
2044 static int x1000_sfc_data_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, };
2045 static int x1000_sfc_clk_pins[] = { 0x1a, };
2046 static int x1000_sfc_ce_pins[] = { 0x1b, };
2047 static int x1000_ssi_dt_a_22_pins[] = { 0x16, };
2048 static int x1000_ssi_dt_a_29_pins[] = { 0x1d, };
2049 static int x1000_ssi_dt_d_pins[] = { 0x62, };
2050 static int x1000_ssi_dr_a_23_pins[] = { 0x17, };
2051 static int x1000_ssi_dr_a_28_pins[] = { 0x1c, };
2052 static int x1000_ssi_dr_d_pins[] = { 0x63, };
2053 static int x1000_ssi_clk_a_24_pins[] = { 0x18, };
2054 static int x1000_ssi_clk_a_26_pins[] = { 0x1a, };
2055 static int x1000_ssi_clk_d_pins[] = { 0x60, };
2056 static int x1000_ssi_gpc_a_20_pins[] = { 0x14, };
2057 static int x1000_ssi_gpc_a_31_pins[] = { 0x1f, };
2058 static int x1000_ssi_ce0_a_25_pins[] = { 0x19, };
2059 static int x1000_ssi_ce0_a_27_pins[] = { 0x1b, };
2060 static int x1000_ssi_ce0_d_pins[] = { 0x61, };
2061 static int x1000_ssi_ce1_a_21_pins[] = { 0x15, };
2062 static int x1000_ssi_ce1_a_30_pins[] = { 0x1e, };
2063 static int x1000_mmc0_1bit_pins[] = { 0x18, 0x19, 0x17, };
2064 static int x1000_mmc0_4bit_pins[] = { 0x16, 0x15, 0x14, };
2065 static int x1000_mmc0_8bit_pins[] = { 0x13, 0x12, 0x11, 0x10, };
2066 static int x1000_mmc1_1bit_pins[] = { 0x40, 0x41, 0x42, };
2067 static int x1000_mmc1_4bit_pins[] = { 0x43, 0x44, 0x45, };
2068 static int x1000_emc_8bit_data_pins[] = {
2071 static int x1000_emc_16bit_data_pins[] = {
2074 static int x1000_emc_addr_pins[] = {
2078 static int x1000_emc_rd_we_pins[] = { 0x30, 0x31, };
2079 static int x1000_emc_wait_pins[] = { 0x34, };
2080 static int x1000_emc_cs1_pins[] = { 0x32, };
2081 static int x1000_emc_cs2_pins[] = { 0x33, };
2082 static int x1000_i2c0_pins[] = { 0x38, 0x37, };
2083 static int x1000_i2c1_a_pins[] = { 0x01, 0x00, };
2084 static int x1000_i2c1_c_pins[] = { 0x5b, 0x5a, };
2085 static int x1000_i2c2_pins[] = { 0x61, 0x60, };
2086 static int x1000_i2s_data_tx_pins[] = { 0x24, };
2087 static int x1000_i2s_data_rx_pins[] = { 0x23, };
2088 static int x1000_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2089 static int x1000_i2s_sysclk_pins[] = { 0x20, };
2090 static int x1000_dmic_if0_pins[] = { 0x35, 0x36, };
2091 static int x1000_dmic_if1_pins[] = { 0x25, };
2092 static int x1000_cim_pins[] = {
2096 static int x1000_lcd_8bit_pins[] = {
2100 static int x1000_lcd_16bit_pins[] = {
2103 static int x1000_pwm_pwm0_pins[] = { 0x59, };
2104 static int x1000_pwm_pwm1_pins[] = { 0x5a, };
2105 static int x1000_pwm_pwm2_pins[] = { 0x5b, };
2106 static int x1000_pwm_pwm3_pins[] = { 0x26, };
2107 static int x1000_pwm_pwm4_pins[] = { 0x58, };
2108 static int x1000_mac_pins[] = {
2112 static const struct group_desc x1000_groups[] = {
2172 static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2173 static const char *x1000_uart1_groups[] = {
2176 static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2177 static const char *x1000_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2178 static const char *x1000_ssi_groups[] = {
2186 static const char *x1000_mmc0_groups[] = {
2189 static const char *x1000_mmc1_groups[] = {
2192 static const char *x1000_emc_groups[] = {
2196 static const char *x1000_cs1_groups[] = { "emc-cs1", };
2197 static const char *x1000_cs2_groups[] = { "emc-cs2", };
2198 static const char *x1000_i2c0_groups[] = { "i2c0-data", };
2199 static const char *x1000_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2200 static const char *x1000_i2c2_groups[] = { "i2c2-data", };
2201 static const char *x1000_i2s_groups[] = {
2204 static const char *x1000_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2205 static const char *x1000_cim_groups[] = { "cim-data", };
2206 static const char *x1000_lcd_groups[] = { "lcd-8bit", "lcd-16bit", };
2207 static const char *x1000_pwm0_groups[] = { "pwm0", };
2208 static const char *x1000_pwm1_groups[] = { "pwm1", };
2209 static const char *x1000_pwm2_groups[] = { "pwm2", };
2210 static const char *x1000_pwm3_groups[] = { "pwm3", };
2211 static const char *x1000_pwm4_groups[] = { "pwm4", };
2212 static const char *x1000_mac_groups[] = { "mac", };
2214 static const struct function_desc x1000_functions[] = {
2240 static const struct regmap_range x1000_access_ranges[] = {
2246 static const struct regmap_access_table x1000_access_table = {
2251 static const struct ingenic_chip_info x1000_chip_info = {
2264 static int x1500_uart0_data_pins[] = { 0x4a, 0x4b, };
2265 static int x1500_uart0_hwflow_pins[] = { 0x4c, 0x4d, };
2266 static int x1500_uart1_data_a_pins[] = { 0x04, 0x05, };
2267 static int x1500_uart1_data_d_pins[] = { 0x62, 0x63, };
2268 static int x1500_uart1_hwflow_pins[] = { 0x64, 0x65, };
2269 static int x1500_uart2_data_a_pins[] = { 0x02, 0x03, };
2270 static int x1500_uart2_data_d_pins[] = { 0x65, 0x64, };
2271 static int x1500_mmc_1bit_pins[] = { 0x18, 0x19, 0x17, };
2272 static int x1500_mmc_4bit_pins[] = { 0x16, 0x15, 0x14, };
2273 static int x1500_i2c0_pins[] = { 0x38, 0x37, };
2274 static int x1500_i2c1_a_pins[] = { 0x01, 0x00, };
2275 static int x1500_i2c1_c_pins[] = { 0x5b, 0x5a, };
2276 static int x1500_i2c2_pins[] = { 0x61, 0x60, };
2277 static int x1500_i2s_data_tx_pins[] = { 0x24, };
2278 static int x1500_i2s_data_rx_pins[] = { 0x23, };
2279 static int x1500_i2s_clk_txrx_pins[] = { 0x21, 0x22, };
2280 static int x1500_i2s_sysclk_pins[] = { 0x20, };
2281 static int x1500_dmic_if0_pins[] = { 0x35, 0x36, };
2282 static int x1500_dmic_if1_pins[] = { 0x25, };
2283 static int x1500_cim_pins[] = {
2287 static int x1500_pwm_pwm0_pins[] = { 0x59, };
2288 static int x1500_pwm_pwm1_pins[] = { 0x5a, };
2289 static int x1500_pwm_pwm2_pins[] = { 0x5b, };
2290 static int x1500_pwm_pwm3_pins[] = { 0x26, };
2291 static int x1500_pwm_pwm4_pins[] = { 0x58, };
2293 static const struct group_desc x1500_groups[] = {
2324 static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2325 static const char *x1500_uart1_groups[] = {
2328 static const char *x1500_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
2329 static const char *x1500_mmc_groups[] = { "mmc-1bit", "mmc-4bit", };
2330 static const char *x1500_i2c0_groups[] = { "i2c0-data", };
2331 static const char *x1500_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", };
2332 static const char *x1500_i2c2_groups[] = { "i2c2-data", };
2333 static const char *x1500_i2s_groups[] = {
2336 static const char *x1500_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2337 static const char *x1500_cim_groups[] = { "cim-data", };
2338 static const char *x1500_pwm0_groups[] = { "pwm0", };
2339 static const char *x1500_pwm1_groups[] = { "pwm1", };
2340 static const char *x1500_pwm2_groups[] = { "pwm2", };
2341 static const char *x1500_pwm3_groups[] = { "pwm3", };
2342 static const char *x1500_pwm4_groups[] = { "pwm4", };
2344 static const struct function_desc x1500_functions[] = {
2363 static const struct ingenic_chip_info x1500_chip_info = {
2376 static const u32 x1600_pull_ups[4] = {
2380 static const u32 x1600_pull_downs[4] = {
2384 static int x1600_uart0_data_pins[] = { 0x27, 0x28, };
2385 static int x1600_uart0_hwflow_pins[] = { 0x29, 0x2a, };
2386 static int x1600_uart1_data_pins[] = { 0x23, 0x22, };
2387 static int x1600_uart1_hwflow_pins[] = { 0x25, 0x24, };
2388 static int x1600_uart2_data_a_pins[] = { 0x1f, 0x1e, };
2389 static int x1600_uart2_data_b_pins[] = { 0x21, 0x20, };
2390 static int x1600_uart3_data_b_pins[] = { 0x25, 0x24, };
2391 static int x1600_uart3_data_d_pins[] = { 0x65, 0x64, };
2392 static int x1600_sfc_pins[] = { 0x53, 0x54, 0x55, 0x56, 0x51, 0x52, 0x24, };
2393 static int x1600_ssi_dt_a_pins[] = { 0x1e, };
2394 static int x1600_ssi_dt_b_pins[] = { 0x2d, };
2395 static int x1600_ssi_dr_a_pins[] = { 0x1d, };
2396 static int x1600_ssi_dr_b_pins[] = { 0x2e, };
2397 static int x1600_ssi_clk_a_pins[] = { 0x1f, };
2398 static int x1600_ssi_clk_b_pins[] = { 0x2c, };
2399 static int x1600_ssi_ce0_a_pins[] = { 0x1c, };
2400 static int x1600_ssi_ce0_b_pins[] = { 0x31, };
2401 static int x1600_ssi_ce1_a_pins[] = { 0x22, };
2402 static int x1600_ssi_ce1_b_pins[] = { 0x30, };
2403 static int x1600_mmc0_1bit_b_pins[] = { 0x2c, 0x2d, 0x2e, };
2404 static int x1600_mmc0_4bit_b_pins[] = { 0x2f, 0x30, 0x31, };
2405 static int x1600_mmc0_1bit_c_pins[] = { 0x51, 0x53, 0x54, };
2406 static int x1600_mmc0_4bit_c_pins[] = { 0x56, 0x55, 0x52, };
2407 static int x1600_mmc1_1bit_pins[] = { 0x60, 0x61, 0x62, };
2408 static int x1600_mmc1_4bit_pins[] = { 0x63, 0x64, 0x65, };
2409 static int x1600_i2c0_a_pins[] = { 0x1d, 0x1c, };
2410 static int x1600_i2c0_b_pins[] = { 0x3f, 0x3e, };
2411 static int x1600_i2c1_b_15_pins[] = { 0x30, 0x2f, };
2412 static int x1600_i2c1_b_19_pins[] = { 0x34, 0x33, };
2413 static int x1600_i2s_data_tx_pins[] = { 0x39, };
2414 static int x1600_i2s_data_rx_pins[] = { 0x35, };
2415 static int x1600_i2s_clk_rx_pins[] = { 0x37, 0x38, };
2416 static int x1600_i2s_clk_tx_pins[] = { 0x3b, 0x3c, };
2417 static int x1600_i2s_sysclk_pins[] = { 0x36, 0x3a, };
2419 static int x1600_cim_pins[] = {
2424 static int x1600_slcd_8bit_pins[] = {
2429 static int x1600_slcd_16bit_pins[] = {
2433 static int x1600_lcd_16bit_pins[] = {
2439 static int x1600_lcd_18bit_pins[] = {
2443 static int x1600_lcd_24bit_pins[] = {
2447 static int x1600_pwm_pwm0_pins[] = { 0x40, };
2448 static int x1600_pwm_pwm1_pins[] = { 0x41, };
2449 static int x1600_pwm_pwm2_pins[] = { 0x42, };
2450 static int x1600_pwm_pwm3_pins[] = { 0x58, };
2451 static int x1600_pwm_pwm4_pins[] = { 0x59, };
2452 static int x1600_pwm_pwm5_b_pins[] = { 0x33, };
2453 static int x1600_pwm_pwm5_c_pins[] = { 0x5a, };
2454 static int x1600_pwm_pwm6_b9_pins[] = { 0x29, };
2455 static int x1600_pwm_pwm6_b20_pins[] = { 0x34, };
2456 static int x1600_pwm_pwm7_b10_pins[] = { 0x2a, };
2457 static int x1600_pwm_pwm7_b21_pins[] = { 0x35, };
2459 static int x1600_mac_pins[] = {
2463 static int x1600_sfc_funcs[] = { 0, 0, 0, 0, 0, 0, 2, };
2465 static const struct group_desc x1600_groups[] = {
2520 static const char * const x1600_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2521 static const char * const x1600_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
2522 static const char * const x1600_uart2_groups[] = { "uart2-data-a", "uart2-data-b", };
2523 static const char * const x1600_uart3_groups[] = { "uart3-data-b", "uart3-data-d", };
2525 static const char * const x1600_sfc_groups[] = { "sfc", };
2527 static const char * const x1600_ssi_groups[] = {
2535 static const char * const x1600_mmc0_groups[] = { "mmc0-1bit-b", "mmc0-4bit-b",
2539 static const char * const x1600_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2541 static const char * const x1600_i2c0_groups[] = { "i2c0-data-a", "i2c0-data-b", };
2542 static const char * const x1600_i2c1_groups[] = { "i2c1-data-b-15", "i2c1-data-b-19", };
2544 static const char * const x1600_i2s_groups[] = {
2548 static const char * const x1600_cim_groups[] = { "cim-data", };
2550 static const char * const x1600_lcd_groups[] = { "slcd-8bit", "slcd-16bit",
2554 static const char * const x1600_pwm0_groups[] = { "pwm0", };
2555 static const char * const x1600_pwm1_groups[] = { "pwm1", };
2556 static const char * const x1600_pwm2_groups[] = { "pwm2", };
2557 static const char * const x1600_pwm3_groups[] = { "pwm3", };
2558 static const char * const x1600_pwm4_groups[] = { "pwm4", };
2559 static const char * const x1600_pwm5_groups[] = { "pwm5-b", "pwm5-c", };
2560 static const char * const x1600_pwm6_groups[] = { "pwm6-b9", "pwm6-b20", };
2561 static const char * const x1600_pwm7_groups[] = { "pwm7-b10", "pwm7-b21", };
2563 static const char * const x1600_mac_groups[] = { "mac", };
2565 static const struct function_desc x1600_functions[] = {
2590 static const struct ingenic_chip_info x1600_chip_info = {
2603 static const u32 x1830_pull_ups[4] = {
2607 static const u32 x1830_pull_downs[4] = {
2611 static int x1830_uart0_data_pins[] = { 0x33, 0x36, };
2612 static int x1830_uart0_hwflow_pins[] = { 0x34, 0x35, };
2613 static int x1830_uart1_data_pins[] = { 0x38, 0x37, };
2614 static int x1830_sfc_data_pins[] = { 0x17, 0x18, 0x1a, 0x19, };
2615 static int x1830_sfc_clk_pins[] = { 0x1b, };
2616 static int x1830_sfc_ce_pins[] = { 0x1c, };
2617 static int x1830_ssi0_dt_pins[] = { 0x4c, };
2618 static int x1830_ssi0_dr_pins[] = { 0x4b, };
2619 static int x1830_ssi0_clk_pins[] = { 0x4f, };
2620 static int x1830_ssi0_gpc_pins[] = { 0x4d, };
2621 static int x1830_ssi0_ce0_pins[] = { 0x50, };
2622 static int x1830_ssi0_ce1_pins[] = { 0x4e, };
2623 static int x1830_ssi1_dt_c_pins[] = { 0x53, };
2624 static int x1830_ssi1_dt_d_pins[] = { 0x62, };
2625 static int x1830_ssi1_dr_c_pins[] = { 0x54, };
2626 static int x1830_ssi1_dr_d_pins[] = { 0x63, };
2627 static int x1830_ssi1_clk_c_pins[] = { 0x57, };
2628 static int x1830_ssi1_clk_d_pins[] = { 0x66, };
2629 static int x1830_ssi1_gpc_c_pins[] = { 0x55, };
2630 static int x1830_ssi1_gpc_d_pins[] = { 0x64, };
2631 static int x1830_ssi1_ce0_c_pins[] = { 0x58, };
2632 static int x1830_ssi1_ce0_d_pins[] = { 0x67, };
2633 static int x1830_ssi1_ce1_c_pins[] = { 0x56, };
2634 static int x1830_ssi1_ce1_d_pins[] = { 0x65, };
2635 static int x1830_mmc0_1bit_pins[] = { 0x24, 0x25, 0x20, };
2636 static int x1830_mmc0_4bit_pins[] = { 0x21, 0x22, 0x23, };
2637 static int x1830_mmc1_1bit_pins[] = { 0x42, 0x43, 0x44, };
2638 static int x1830_mmc1_4bit_pins[] = { 0x45, 0x46, 0x47, };
2639 static int x1830_i2c0_pins[] = { 0x0c, 0x0d, };
2640 static int x1830_i2c1_pins[] = { 0x39, 0x3a, };
2641 static int x1830_i2c2_pins[] = { 0x5b, 0x5c, };
2642 static int x1830_i2s_data_tx_pins[] = { 0x53, };
2643 static int x1830_i2s_data_rx_pins[] = { 0x54, };
2644 static int x1830_i2s_clk_txrx_pins[] = { 0x58, 0x52, };
2645 static int x1830_i2s_clk_rx_pins[] = { 0x56, 0x55, };
2646 static int x1830_i2s_sysclk_pins[] = { 0x57, };
2647 static int x1830_dmic_if0_pins[] = { 0x48, 0x59, };
2648 static int x1830_dmic_if1_pins[] = { 0x5a, };
2649 static int x1830_lcd_tft_8bit_pins[] = {
2653 static int x1830_lcd_tft_24bit_pins[] = {
2657 static int x1830_lcd_slcd_8bit_pins[] = {
2661 static int x1830_lcd_slcd_16bit_pins[] = {
2664 static int x1830_pwm_pwm0_b_pins[] = { 0x31, };
2665 static int x1830_pwm_pwm0_c_pins[] = { 0x4b, };
2666 static int x1830_pwm_pwm1_b_pins[] = { 0x32, };
2667 static int x1830_pwm_pwm1_c_pins[] = { 0x4c, };
2668 static int x1830_pwm_pwm2_c_8_pins[] = { 0x48, };
2669 static int x1830_pwm_pwm2_c_13_pins[] = { 0x4d, };
2670 static int x1830_pwm_pwm3_c_9_pins[] = { 0x49, };
2671 static int x1830_pwm_pwm3_c_14_pins[] = { 0x4e, };
2672 static int x1830_pwm_pwm4_c_15_pins[] = { 0x4f, };
2673 static int x1830_pwm_pwm4_c_25_pins[] = { 0x59, };
2674 static int x1830_pwm_pwm5_c_16_pins[] = { 0x50, };
2675 static int x1830_pwm_pwm5_c_26_pins[] = { 0x5a, };
2676 static int x1830_pwm_pwm6_c_17_pins[] = { 0x51, };
2677 static int x1830_pwm_pwm6_c_27_pins[] = { 0x5b, };
2678 static int x1830_pwm_pwm7_c_18_pins[] = { 0x52, };
2679 static int x1830_pwm_pwm7_c_28_pins[] = { 0x5c, };
2680 static int x1830_mac_pins[] = {
2684 static const struct group_desc x1830_groups[] = {
2746 static const char *x1830_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
2747 static const char *x1830_uart1_groups[] = { "uart1-data", };
2748 static const char *x1830_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
2749 static const char *x1830_ssi0_groups[] = {
2752 static const char *x1830_ssi1_groups[] = {
2760 static const char *x1830_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", };
2761 static const char *x1830_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
2762 static const char *x1830_i2c0_groups[] = { "i2c0-data", };
2763 static const char *x1830_i2c1_groups[] = { "i2c1-data", };
2764 static const char *x1830_i2c2_groups[] = { "i2c2-data", };
2765 static const char *x1830_i2s_groups[] = {
2768 static const char *x1830_dmic_groups[] = { "dmic-if0", "dmic-if1", };
2769 static const char *x1830_lcd_groups[] = {
2772 static const char *x1830_pwm0_groups[] = { "pwm0-b", "pwm0-c", };
2773 static const char *x1830_pwm1_groups[] = { "pwm1-b", "pwm1-c", };
2774 static const char *x1830_pwm2_groups[] = { "pwm2-c-8", "pwm2-c-13", };
2775 static const char *x1830_pwm3_groups[] = { "pwm3-c-9", "pwm3-c-14", };
2776 static const char *x1830_pwm4_groups[] = { "pwm4-c-15", "pwm4-c-25", };
2777 static const char *x1830_pwm5_groups[] = { "pwm5-c-16", "pwm5-c-26", };
2778 static const char *x1830_pwm6_groups[] = { "pwm6-c-17", "pwm6-c-27", };
2779 static const char *x1830_pwm7_groups[] = { "pwm7-c-18", "pwm7-c-28", };
2780 static const char *x1830_mac_groups[] = { "mac", };
2782 static const struct function_desc x1830_functions[] = {
2807 static const struct regmap_range x1830_access_ranges[] = {
2812 static const struct regmap_access_table x1830_access_table = {
2817 static const struct ingenic_chip_info x1830_chip_info = {
2830 static const u32 x2000_pull_ups[5] = {
2834 static const u32 x2000_pull_downs[5] = {
2838 static int x2000_uart0_data_pins[] = { 0x77, 0x78, };
2839 static int x2000_uart0_hwflow_pins[] = { 0x79, 0x7a, };
2840 static int x2000_uart1_data_pins[] = { 0x57, 0x58, };
2841 static int x2000_uart1_hwflow_pins[] = { 0x55, 0x56, };
2842 static int x2000_uart2_data_pins[] = { 0x7e, 0x7f, };
2843 static int x2000_uart3_data_c_pins[] = { 0x59, 0x5a, };
2844 static int x2000_uart3_data_d_pins[] = { 0x62, 0x63, };
2845 static int x2000_uart3_hwflow_c_pins[] = { 0x5b, 0x5c, };
2846 static int x2000_uart3_hwflow_d_pins[] = { 0x60, 0x61, };
2847 static int x2000_uart4_data_a_pins[] = { 0x02, 0x03, };
2848 static int x2000_uart4_data_c_pins[] = { 0x4b, 0x4c, };
2849 static int x2000_uart4_hwflow_a_pins[] = { 0x00, 0x01, };
2850 static int x2000_uart4_hwflow_c_pins[] = { 0x49, 0x4a, };
2851 static int x2000_uart5_data_a_pins[] = { 0x04, 0x05, };
2852 static int x2000_uart5_data_c_pins[] = { 0x45, 0x46, };
2853 static int x2000_uart6_data_a_pins[] = { 0x06, 0x07, };
2854 static int x2000_uart6_data_c_pins[] = { 0x47, 0x48, };
2855 static int x2000_uart7_data_a_pins[] = { 0x08, 0x09, };
2856 static int x2000_uart7_data_c_pins[] = { 0x41, 0x42, };
2857 static int x2000_uart8_data_pins[] = { 0x3c, 0x3d, };
2858 static int x2000_uart9_data_pins[] = { 0x3e, 0x3f, };
2859 static int x2000_sfc_data_if0_d_pins[] = { 0x73, 0x74, 0x75, 0x76, };
2860 static int x2000_sfc_data_if0_e_pins[] = { 0x92, 0x93, 0x94, 0x95, };
2861 static int x2000_sfc_data_if1_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2862 static int x2000_sfc_clk_d_pins[] = { 0x71, };
2863 static int x2000_sfc_clk_e_pins[] = { 0x90, };
2864 static int x2000_sfc_ce_d_pins[] = { 0x72, };
2865 static int x2000_sfc_ce_e_pins[] = { 0x91, };
2866 static int x2000_ssi0_dt_b_pins[] = { 0x3e, };
2867 static int x2000_ssi0_dt_d_pins[] = { 0x69, };
2868 static int x2000_ssi0_dr_b_pins[] = { 0x3d, };
2869 static int x2000_ssi0_dr_d_pins[] = { 0x6a, };
2870 static int x2000_ssi0_clk_b_pins[] = { 0x3f, };
2871 static int x2000_ssi0_clk_d_pins[] = { 0x68, };
2872 static int x2000_ssi0_ce_b_pins[] = { 0x3c, };
2873 static int x2000_ssi0_ce_d_pins[] = { 0x6d, };
2874 static int x2000_ssi1_dt_c_pins[] = { 0x4b, };
2875 static int x2000_ssi1_dt_d_pins[] = { 0x72, };
2876 static int x2000_ssi1_dt_e_pins[] = { 0x91, };
2877 static int x2000_ssi1_dr_c_pins[] = { 0x4a, };
2878 static int x2000_ssi1_dr_d_pins[] = { 0x73, };
2879 static int x2000_ssi1_dr_e_pins[] = { 0x92, };
2880 static int x2000_ssi1_clk_c_pins[] = { 0x4c, };
2881 static int x2000_ssi1_clk_d_pins[] = { 0x71, };
2882 static int x2000_ssi1_clk_e_pins[] = { 0x90, };
2883 static int x2000_ssi1_ce_c_pins[] = { 0x49, };
2884 static int x2000_ssi1_ce_d_pins[] = { 0x76, };
2885 static int x2000_ssi1_ce_e_pins[] = { 0x95, };
2886 static int x2000_mmc0_1bit_pins[] = { 0x71, 0x72, 0x73, };
2887 static int x2000_mmc0_4bit_pins[] = { 0x74, 0x75, 0x75, };
2888 static int x2000_mmc0_8bit_pins[] = { 0x77, 0x78, 0x79, 0x7a, };
2889 static int x2000_mmc1_1bit_pins[] = { 0x68, 0x69, 0x6a, };
2890 static int x2000_mmc1_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
2891 static int x2000_mmc2_1bit_pins[] = { 0x80, 0x81, 0x82, };
2892 static int x2000_mmc2_4bit_pins[] = { 0x83, 0x84, 0x85, };
2893 static int x2000_emc_8bit_data_pins[] = {
2896 static int x2000_emc_16bit_data_pins[] = {
2899 static int x2000_emc_addr_pins[] = {
2903 static int x2000_emc_rd_we_pins[] = { 0x2d, 0x2e, };
2904 static int x2000_emc_wait_pins[] = { 0x2f, };
2905 static int x2000_emc_cs1_pins[] = { 0x57, };
2906 static int x2000_emc_cs2_pins[] = { 0x58, };
2907 static int x2000_i2c0_pins[] = { 0x4e, 0x4d, };
2908 static int x2000_i2c1_c_pins[] = { 0x58, 0x57, };
2909 static int x2000_i2c1_d_pins[] = { 0x6c, 0x6b, };
2910 static int x2000_i2c2_b_pins[] = { 0x37, 0x36, };
2911 static int x2000_i2c2_d_pins[] = { 0x75, 0x74, };
2912 static int x2000_i2c2_e_pins[] = { 0x94, 0x93, };
2913 static int x2000_i2c3_a_pins[] = { 0x11, 0x10, };
2914 static int x2000_i2c3_d_pins[] = { 0x7f, 0x7e, };
2915 static int x2000_i2c4_c_pins[] = { 0x5a, 0x59, };
2916 static int x2000_i2c4_d_pins[] = { 0x61, 0x60, };
2917 static int x2000_i2c5_c_pins[] = { 0x5c, 0x5b, };
2918 static int x2000_i2c5_d_pins[] = { 0x65, 0x64, };
2919 static int x2000_i2s1_data_tx_pins[] = { 0x47, };
2920 static int x2000_i2s1_data_rx_pins[] = { 0x44, };
2921 static int x2000_i2s1_clk_tx_pins[] = { 0x45, 0x46, };
2922 static int x2000_i2s1_clk_rx_pins[] = { 0x42, 0x43, };
2923 static int x2000_i2s1_sysclk_tx_pins[] = { 0x48, };
2924 static int x2000_i2s1_sysclk_rx_pins[] = { 0x41, };
2925 static int x2000_i2s2_data_rx0_pins[] = { 0x0a, };
2926 static int x2000_i2s2_data_rx1_pins[] = { 0x0b, };
2927 static int x2000_i2s2_data_rx2_pins[] = { 0x0c, };
2928 static int x2000_i2s2_data_rx3_pins[] = { 0x0d, };
2929 static int x2000_i2s2_clk_rx_pins[] = { 0x11, 0x09, };
2930 static int x2000_i2s2_sysclk_rx_pins[] = { 0x07, };
2931 static int x2000_i2s3_data_tx0_pins[] = { 0x03, };
2932 static int x2000_i2s3_data_tx1_pins[] = { 0x04, };
2933 static int x2000_i2s3_data_tx2_pins[] = { 0x05, };
2934 static int x2000_i2s3_data_tx3_pins[] = { 0x06, };
2935 static int x2000_i2s3_clk_tx_pins[] = { 0x10, 0x02, };
2936 static int x2000_i2s3_sysclk_tx_pins[] = { 0x00, };
2937 static int x2000_dmic_if0_pins[] = { 0x54, 0x55, };
2938 static int x2000_dmic_if1_pins[] = { 0x56, };
2939 static int x2000_dmic_if2_pins[] = { 0x57, };
2940 static int x2000_dmic_if3_pins[] = { 0x58, };
2941 static int x2000_cim_8bit_pins[] = {
2945 static int x2000_cim_12bit_pins[] = { 0x08, 0x09, 0x0a, 0x0b, };
2946 static int x2000_lcd_tft_8bit_pins[] = {
2950 static int x2000_lcd_tft_16bit_pins[] = {
2953 static int x2000_lcd_tft_18bit_pins[] = {
2956 static int x2000_lcd_tft_24bit_pins[] = {
2959 static int x2000_lcd_slcd_8bit_pins[] = {
2963 static int x2000_pwm_pwm0_c_pins[] = { 0x40, };
2964 static int x2000_pwm_pwm0_d_pins[] = { 0x7e, };
2965 static int x2000_pwm_pwm1_c_pins[] = { 0x41, };
2966 static int x2000_pwm_pwm1_d_pins[] = { 0x7f, };
2967 static int x2000_pwm_pwm2_c_pins[] = { 0x42, };
2968 static int x2000_pwm_pwm2_e_pins[] = { 0x80, };
2969 static int x2000_pwm_pwm3_c_pins[] = { 0x43, };
2970 static int x2000_pwm_pwm3_e_pins[] = { 0x81, };
2971 static int x2000_pwm_pwm4_c_pins[] = { 0x44, };
2972 static int x2000_pwm_pwm4_e_pins[] = { 0x82, };
2973 static int x2000_pwm_pwm5_c_pins[] = { 0x45, };
2974 static int x2000_pwm_pwm5_e_pins[] = { 0x83, };
2975 static int x2000_pwm_pwm6_c_pins[] = { 0x46, };
2976 static int x2000_pwm_pwm6_e_pins[] = { 0x84, };
2977 static int x2000_pwm_pwm7_c_pins[] = { 0x47, };
2978 static int x2000_pwm_pwm7_e_pins[] = { 0x85, };
2979 static int x2000_pwm_pwm8_pins[] = { 0x48, };
2980 static int x2000_pwm_pwm9_pins[] = { 0x49, };
2981 static int x2000_pwm_pwm10_pins[] = { 0x4a, };
2982 static int x2000_pwm_pwm11_pins[] = { 0x4b, };
2983 static int x2000_pwm_pwm12_pins[] = { 0x4c, };
2984 static int x2000_pwm_pwm13_pins[] = { 0x4d, };
2985 static int x2000_pwm_pwm14_pins[] = { 0x4e, };
2986 static int x2000_pwm_pwm15_pins[] = { 0x4f, };
2987 static int x2000_mac0_rmii_pins[] = {
2990 static int x2000_mac0_rgmii_pins[] = {
2994 static int x2000_mac1_rmii_pins[] = {
2997 static int x2000_mac1_rgmii_pins[] = {
3001 static int x2000_otg_pins[] = { 0x96, };
3003 static u8 x2000_cim_8bit_funcs[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, };
3005 static const struct group_desc x2000_groups[] = {
3142 static const char *x2000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
3143 static const char *x2000_uart1_groups[] = { "uart1-data", "uart1-hwflow", };
3144 static const char *x2000_uart2_groups[] = { "uart2-data", };
3145 static const char *x2000_uart3_groups[] = {
3148 static const char *x2000_uart4_groups[] = {
3151 static const char *x2000_uart5_groups[] = { "uart5-data-a", "uart5-data-c", };
3152 static const char *x2000_uart6_groups[] = { "uart6-data-a", "uart6-data-c", };
3153 static const char *x2000_uart7_groups[] = { "uart7-data-a", "uart7-data-c", };
3154 static const char *x2000_uart8_groups[] = { "uart8-data", };
3155 static const char *x2000_uart9_groups[] = { "uart9-data", };
3156 static const char *x2000_sfc_groups[] = {
3160 static const char *x2000_ssi0_groups[] = {
3166 static const char *x2000_ssi1_groups[] = {
3172 static const char *x2000_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", "mmc0-8bit", };
3173 static const char *x2000_mmc1_groups[] = { "mmc1-1bit", "mmc1-4bit", };
3174 static const char *x2000_mmc2_groups[] = { "mmc2-1bit", "mmc2-4bit", };
3175 static const char *x2000_emc_groups[] = {
3179 static const char *x2000_cs1_groups[] = { "emc-cs1", };
3180 static const char *x2000_cs2_groups[] = { "emc-cs2", };
3181 static const char *x2000_i2c0_groups[] = { "i2c0-data", };
3182 static const char *x2000_i2c1_groups[] = { "i2c1-data-c", "i2c1-data-d", };
3183 static const char *x2000_i2c2_groups[] = { "i2c2-data-b", "i2c2-data-d", };
3184 static const char *x2000_i2c3_groups[] = { "i2c3-data-a", "i2c3-data-d", };
3185 static const char *x2000_i2c4_groups[] = { "i2c4-data-c", "i2c4-data-d", };
3186 static const char *x2000_i2c5_groups[] = { "i2c5-data-c", "i2c5-data-d", };
3187 static const char *x2000_i2s1_groups[] = {
3192 static const char *x2000_i2s2_groups[] = {
3196 static const char *x2000_i2s3_groups[] = {
3200 static const char *x2000_dmic_groups[] = {
3203 static const char *x2000_cim_groups[] = { "cim-data-8bit", "cim-data-12bit", };
3204 static const char *x2000_lcd_groups[] = {
3208 static const char *x2000_pwm0_groups[] = { "pwm0-c", "pwm0-d", };
3209 static const char *x2000_pwm1_groups[] = { "pwm1-c", "pwm1-d", };
3210 static const char *x2000_pwm2_groups[] = { "pwm2-c", "pwm2-e", };
3211 static const char *x2000_pwm3_groups[] = { "pwm3-c", "pwm3-r", };
3212 static const char *x2000_pwm4_groups[] = { "pwm4-c", "pwm4-e", };
3213 static const char *x2000_pwm5_groups[] = { "pwm5-c", "pwm5-e", };
3214 static const char *x2000_pwm6_groups[] = { "pwm6-c", "pwm6-e", };
3215 static const char *x2000_pwm7_groups[] = { "pwm7-c", "pwm7-e", };
3216 static const char *x2000_pwm8_groups[] = { "pwm8", };
3217 static const char *x2000_pwm9_groups[] = { "pwm9", };
3218 static const char *x2000_pwm10_groups[] = { "pwm10", };
3219 static const char *x2000_pwm11_groups[] = { "pwm11", };
3220 static const char *x2000_pwm12_groups[] = { "pwm12", };
3221 static const char *x2000_pwm13_groups[] = { "pwm13", };
3222 static const char *x2000_pwm14_groups[] = { "pwm14", };
3223 static const char *x2000_pwm15_groups[] = { "pwm15", };
3224 static const char *x2000_mac0_groups[] = { "mac0-rmii", "mac0-rgmii", };
3225 static const char *x2000_mac1_groups[] = { "mac1-rmii", "mac1-rgmii", };
3226 static const char *x2000_otg_groups[] = { "otg-vbus", };
3228 static const struct function_desc x2000_functions[] = {
3281 static const struct regmap_range x2000_access_ranges[] = {
3287 static const struct regmap_access_table x2000_access_table = {
3292 static const struct ingenic_chip_info x2000_chip_info = {
3305 static const u32 x2100_pull_ups[5] = {
3309 static const u32 x2100_pull_downs[5] = {
3313 static int x2100_mac_pins[] = {
3317 static const struct group_desc x2100_groups[] = {
3450 static const char *x2100_mac_groups[] = { "mac", };
3452 static const struct function_desc x2100_functions[] = {
3503 static const struct ingenic_chip_info x2100_chip_info = {
3516 static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg)  in ingenic_gpio_read_reg()
3525 static void ingenic_gpio_set_bit(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_set_bit()
3542 static void ingenic_gpio_shadow_set_bit(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_shadow_set_bit()
3554 static void ingenic_gpio_shadow_set_bit_load(struct ingenic_gpio_chip *jzgc)  in ingenic_gpio_shadow_set_bit_load()
3561 static void jz4730_gpio_set_bits(struct ingenic_gpio_chip *jzgc,  in jz4730_gpio_set_bits()
3575 static inline bool ingenic_gpio_get_value(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_get_value()
3583 static void ingenic_gpio_set_value(struct ingenic_gpio_chip *jzgc,  in ingenic_gpio_set_value()
3594 static void irq_set_type(struct ingenic_gpio_chip *jzgc,  in irq_set_type()
3651 static void ingenic_gpio_irq_mask(struct irq_data *irqd)  in ingenic_gpio_irq_mask()
3663 static void ingenic_gpio_irq_unmask(struct irq_data *irqd)  in ingenic_gpio_irq_unmask()
3675 static void ingenic_gpio_irq_enable(struct irq_data *irqd)  in ingenic_gpio_irq_enable()
3693 static void ingenic_gpio_irq_disable(struct irq_data *irqd)  in ingenic_gpio_irq_disable()
3711 static void ingenic_gpio_irq_ack(struct irq_data *irqd)  in ingenic_gpio_irq_ack()
3739 static int ingenic_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)  in ingenic_gpio_irq_set_type()
3774 static int ingenic_gpio_irq_set_wake(struct irq_data *irqd, unsigned int on)  in ingenic_gpio_irq_set_wake()
3782 static void ingenic_gpio_irq_handler(struct irq_desc *desc)  in ingenic_gpio_irq_handler()
3803 static void ingenic_gpio_set(struct gpio_chip *gc,  in ingenic_gpio_set()
3811 static int ingenic_gpio_get(struct gpio_chip *gc, unsigned int offset)  in ingenic_gpio_get()
3818 static int ingenic_gpio_direction_output(struct gpio_chip *gc,  in ingenic_gpio_direction_output()
3825 static inline void ingenic_config_pin(struct ingenic_pinctrl *jzpc,  in ingenic_config_pin()
3848 static inline void ingenic_shadow_config_pin(struct ingenic_pinctrl *jzpc,  in ingenic_shadow_config_pin()
3857 static inline void ingenic_shadow_config_pin_load(struct ingenic_pinctrl *jzpc,  in ingenic_shadow_config_pin_load()
3864 static inline void jz4730_config_pin_function(struct ingenic_pinctrl *jzpc,  in jz4730_config_pin_function()
3880 static inline bool ingenic_get_pin_config(struct ingenic_pinctrl *jzpc,  in ingenic_get_pin_config()
3892 static int ingenic_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)  in ingenic_gpio_get_direction()
3918 static const struct pinctrl_ops ingenic_pctlops = {
3926 static int ingenic_gpio_irq_request(struct irq_data *data)  in ingenic_gpio_irq_request()
3939 static void ingenic_gpio_irq_release(struct irq_data *data)  in ingenic_gpio_irq_release()
3947 static void ingenic_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)  in ingenic_gpio_irq_print_chip()
3954 static const struct irq_chip ingenic_gpio_irqchip = {
3968 static int ingenic_pinmux_set_pin_fn(struct ingenic_pinctrl *jzpc,  in ingenic_pinmux_set_pin_fn()
4000 static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev,  in ingenic_pinmux_set_mux()
4035 static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,  in ingenic_pinmux_gpio_set_direction()
4068 static const struct pinmux_ops ingenic_pmxops = {
4076 static int ingenic_pinconf_get(struct pinctrl_dev *pctldev,  in ingenic_pinconf_get()
4174 static void ingenic_set_bias(struct ingenic_pinctrl *jzpc,  in ingenic_set_bias()
4224 static void ingenic_set_schmitt_trigger(struct ingenic_pinctrl *jzpc,  in ingenic_set_schmitt_trigger()
4233 static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc,  in ingenic_set_output_level()
4244 static void ingenic_set_slew_rate(struct ingenic_pinctrl *jzpc,  in ingenic_set_slew_rate()
4253 static int ingenic_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,  in ingenic_pinconf_set()
4334 static int ingenic_pinconf_group_get(struct pinctrl_dev *pctldev,  in ingenic_pinconf_group_get()
4359 static int ingenic_pinconf_group_set(struct pinctrl_dev *pctldev,  in ingenic_pinconf_group_set()
4381 static const struct pinconf_ops ingenic_confops = {
4389 static const struct regmap_config ingenic_pinctrl_regmap_config = {
4395 static const struct of_device_id ingenic_gpio_of_matches[] __initconst = {
4413 static int __init ingenic_gpio_probe(struct ingenic_pinctrl *jzpc,  in ingenic_gpio_probe()
4487 static int __init ingenic_pinctrl_probe(struct platform_device *pdev)  in ingenic_pinctrl_probe()
4601 static const struct of_device_id ingenic_pinctrl_of_matches[] = {
4677 static struct platform_driver ingenic_pinctrl_driver = {
4684 static int __init ingenic_pinctrl_drv_register(void)  in ingenic_pinctrl_drv_register()