Lines Matching +full:12 +full:- +full:13
1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pinctrl/pinconf-generic.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
16 #include "pinctrl-mtk-common.h"
17 #include "pinctrl-mtk-mt2712.h"
21 MTK_PIN_PUPD_SPEC_SR(19, 0xe60, 12, 11, 10),
23 MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 15, 14, 13),
30 MTK_PIN_PUPD_SPEC_SR(33, 0xf30, 14, 13, 12),
46 MTK_PIN_PUPD_SPEC_SR(49, 0xdf0, 14, 13, 12),
56 MTK_PIN_PUPD_SPEC_SR(64, 0xdb0, 14, 13, 12),
65 MTK_PIN_PUPD_SPEC_SR(90, 0xdd0, 14, 13, 12),
74 MTK_PIN_PUPD_SPEC_SR(136, 0xe50, 14, 13, 12),
78 MTK_PIN_PUPD_SPEC_SR(140, 0xe70, 14, 13, 12),
87 MTK_PIN_IES_SMT_SPEC(12, 12, 0x8d0, 6),
88 MTK_PIN_IES_SMT_SPEC(13, 13, 0x8d0, 7),
96 MTK_PIN_IES_SMT_SPEC(30, 36, 0xf50, 13),
97 MTK_PIN_IES_SMT_SPEC(37, 37, 0xc40, 13),
98 MTK_PIN_IES_SMT_SPEC(38, 45, 0xc60, 13),
99 MTK_PIN_IES_SMT_SPEC(46, 46, 0xc50, 13),
100 MTK_PIN_IES_SMT_SPEC(47, 47, 0xda0, 13),
101 MTK_PIN_IES_SMT_SPEC(48, 48, 0xd90, 13),
102 MTK_PIN_IES_SMT_SPEC(49, 52, 0xd60, 13),
103 MTK_PIN_IES_SMT_SPEC(53, 53, 0xd50, 13),
104 MTK_PIN_IES_SMT_SPEC(54, 54, 0xd80, 13),
105 MTK_PIN_IES_SMT_SPEC(55, 55, 0xe00, 13),
106 MTK_PIN_IES_SMT_SPEC(56, 56, 0xd40, 13),
108 MTK_PIN_IES_SMT_SPEC(63, 63, 0xc80, 13),
109 MTK_PIN_IES_SMT_SPEC(64, 66, 0xca0, 13),
110 MTK_PIN_IES_SMT_SPEC(67, 67, 0xc80, 13),
111 MTK_PIN_IES_SMT_SPEC(68, 68, 0xca0, 13),
112 MTK_PIN_IES_SMT_SPEC(69, 69, 0xc90, 13),
113 MTK_PIN_IES_SMT_SPEC(70, 70, 0xc80, 13),
118 MTK_PIN_IES_SMT_SPEC(89, 89, 0xce0, 13),
119 MTK_PIN_IES_SMT_SPEC(90, 93, 0xd00, 13),
120 MTK_PIN_IES_SMT_SPEC(94, 94, 0xce0, 13),
121 MTK_PIN_IES_SMT_SPEC(95, 96, 0xcf0, 13),
123 MTK_PIN_IES_SMT_SPEC(101, 104, 0x8d0, 12),
124 MTK_PIN_IES_SMT_SPEC(105, 105, 0x8d0, 13),
130 MTK_PIN_IES_SMT_SPEC(111, 111, 0x8d0, 13),
149 MTK_PIN_IES_SMT_SPEC(157, 160, 0x8e0, 12),
150 MTK_PIN_IES_SMT_SPEC(161, 164, 0x8e0, 13),
174 MTK_PIN_IES_SMT_SPEC(196, 199, 0x8f0, 12),
175 MTK_PIN_IES_SMT_SPEC(200, 203, 0x8f0, 13),
185 MTK_PIN_IES_SMT_SPEC(12, 12, 0x890, 6),
186 MTK_PIN_IES_SMT_SPEC(13, 13, 0x890, 7),
220 MTK_PIN_IES_SMT_SPEC(101, 104, 0x890, 12),
221 MTK_PIN_IES_SMT_SPEC(105, 105, 0x890, 13),
227 MTK_PIN_IES_SMT_SPEC(111, 111, 0x890, 13),
246 MTK_PIN_IES_SMT_SPEC(157, 160, 0x8a0, 12),
247 MTK_PIN_IES_SMT_SPEC(161, 164, 0x8a0, 13),
271 MTK_PIN_IES_SMT_SPEC(196, 199, 0x8b0, 12),
272 MTK_PIN_IES_SMT_SPEC(200, 203, 0x8b0, 13),
278 /* 0E4E8SR 4/8/12/16 */
282 /* E8E4E2 2/4/6/8/10/12/14/16 */
292 MTK_PIN_DRV_GRP(4, 0xc00, 12, 0),
293 MTK_PIN_DRV_GRP(5, 0xc00, 12, 0),
294 MTK_PIN_DRV_GRP(6, 0xc00, 12, 0),
295 MTK_PIN_DRV_GRP(7, 0xc00, 12, 0),
302 MTK_PIN_DRV_GRP(12, 0xb60, 0, 0),
304 MTK_PIN_DRV_GRP(13, 0xb60, 4, 0),
321 MTK_PIN_DRV_GRP(26, 0xb40, 12, 0),
325 MTK_PIN_DRV_GRP(28, 0xb40, 12, 0),
326 MTK_PIN_DRV_GRP(29, 0xb40, 12, 0),
385 MTK_PIN_DRV_GRP(75, 0xb60, 12, 1),
386 MTK_PIN_DRV_GRP(76, 0xb60, 12, 1),
387 MTK_PIN_DRV_GRP(77, 0xb60, 12, 1),
394 MTK_PIN_DRV_GRP(82, 0xb60, 12, 1),
395 MTK_PIN_DRV_GRP(83, 0xb60, 12, 1),
396 MTK_PIN_DRV_GRP(84, 0xb60, 12, 1),
397 MTK_PIN_DRV_GRP(85, 0xb60, 12, 1),
398 MTK_PIN_DRV_GRP(86, 0xb60, 12, 1),
399 MTK_PIN_DRV_GRP(87, 0xb60, 12, 1),
400 MTK_PIN_DRV_GRP(88, 0xb60, 12, 1),
434 MTK_PIN_DRV_GRP(143, 0xba0, 12, 0),
435 MTK_PIN_DRV_GRP(144, 0xba0, 12, 0),
436 MTK_PIN_DRV_GRP(145, 0xba0, 12, 0),
437 MTK_PIN_DRV_GRP(146, 0xba0, 12, 0),
438 MTK_PIN_DRV_GRP(147, 0xba0, 12, 0),
456 MTK_PIN_DRV_GRP(161, 0xbb0, 12, 0),
457 MTK_PIN_DRV_GRP(162, 0xbb0, 12, 0),
458 MTK_PIN_DRV_GRP(163, 0xbb0, 12, 0),
459 MTK_PIN_DRV_GRP(164, 0xbb0, 12, 0),
472 MTK_PIN_DRV_GRP(173, 0xbc0, 12, 0),
477 MTK_PIN_DRV_GRP(176, 0xbc0, 12, 0),
487 MTK_PIN_DRV_GRP(181, 0xbd0, 12, 0),
491 MTK_PIN_DRV_GRP(183, 0xbd0, 12, 0),
499 MTK_PIN_DRV_GRP(187, 0xbe0, 12, 0),
503 MTK_PIN_DRV_GRP(189, 0xbe0, 12, 0),
516 MTK_PIN_DRV_GRP(196, 0xbf0, 12, 0),
517 MTK_PIN_DRV_GRP(197, 0xbf0, 12, 0),
518 MTK_PIN_DRV_GRP(198, 0xbf0, 12, 0),
519 MTK_PIN_DRV_GRP(199, 0xbf0, 12, 0),
574 { .compatible = "mediatek,mt2712-pinctrl", .data = &mt2712_pinctrl_data },
582 .name = "mediatek-mt2712-pinctrl",