Lines Matching +full:xusb +full:- +full:padctl
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
18 #include "xusb.h"
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
31 /* XUSB PADCTL registers */
121 /* XUSB AO registers */
276 /* padctl context */
282 writel(value, priv->ao_regs + offset); in ao_writel()
287 return readl(priv->ao_regs + offset); in ao_readl()
291 to_tegra186_xusb_padctl(struct tegra_xusb_padctl *padctl) in to_tegra186_xusb_padctl() argument
293 return container_of(padctl, struct tegra186_xusb_padctl, base); in to_tegra186_xusb_padctl()
306 return ERR_PTR(-ENOMEM); in tegra186_usb2_lane_probe()
308 INIT_LIST_HEAD(&usb2->base.list); in tegra186_usb2_lane_probe()
309 usb2->base.soc = &pad->soc->lanes[index]; in tegra186_usb2_lane_probe()
310 usb2->base.index = index; in tegra186_usb2_lane_probe()
311 usb2->base.pad = pad; in tegra186_usb2_lane_probe()
312 usb2->base.np = np; in tegra186_usb2_lane_probe()
314 err = tegra_xusb_lane_parse_dt(&usb2->base, np); in tegra186_usb2_lane_probe()
320 return &usb2->base; in tegra186_usb2_lane_probe()
333 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_sleepwalk() local
334 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_enable_phy_sleepwalk()
335 unsigned int index = lane->index; in tegra186_utmi_enable_phy_sleepwalk()
338 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
415 /* setup the pull-ups and pull-downs of the signals during the four in tegra186_utmi_enable_phy_sleepwalk()
426 /* J state: D+/D- = high/low, K state: D+/D- = low/high */ in tegra186_utmi_enable_phy_sleepwalk()
430 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
435 /* J state: D+/D- = low/high, K state: D+/D- = high/low */ in tegra186_utmi_enable_phy_sleepwalk()
439 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
474 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
481 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_sleepwalk() local
482 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_disable_phy_sleepwalk()
483 unsigned int index = lane->index; in tegra186_utmi_disable_phy_sleepwalk()
486 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
493 /* switch the electric control of the USB2.0 pad to XUSB vcore logic */ in tegra186_utmi_disable_phy_sleepwalk()
505 if (padctl->soc->supports_lp_cfg_en) { in tegra186_utmi_disable_phy_sleepwalk()
522 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
529 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_wake() local
530 unsigned int index = lane->index; in tegra186_utmi_enable_phy_wake()
533 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
535 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
538 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
542 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
545 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
547 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
554 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_wake() local
555 unsigned int index = lane->index; in tegra186_utmi_disable_phy_wake()
558 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
560 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
563 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
567 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
570 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
572 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
579 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_remote_wake_detected() local
580 unsigned int index = lane->index; in tegra186_utmi_phy_remote_wake_detected()
583 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_phy_remote_wake_detected()
601 static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl) in tegra186_utmi_bias_pad_power_on() argument
603 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_bias_pad_power_on()
604 struct device *dev = padctl->dev; in tegra186_utmi_bias_pad_power_on()
608 if (!bitmap_empty(priv->utmi_pad_enabled, TEGRA_UTMI_PAD_MAX)) in tegra186_utmi_bias_pad_power_on()
611 err = clk_prepare_enable(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_on()
615 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
620 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
622 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
625 value |= HS_SQUELCH_LEVEL(priv->calib.hs_squelch); in tegra186_utmi_bias_pad_power_on()
626 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
630 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
632 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
634 if (padctl->soc->poll_trk_completed) { in tegra186_utmi_bias_pad_power_on()
635 err = padctl_readl_poll(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1, in tegra186_utmi_bias_pad_power_on()
644 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
646 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
651 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_on()
652 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
655 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
657 clk_disable_unprepare(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_on()
661 static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl) in tegra186_utmi_bias_pad_power_off() argument
663 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_bias_pad_power_off()
666 if (!bitmap_empty(priv->utmi_pad_enabled, TEGRA_UTMI_PAD_MAX)) in tegra186_utmi_bias_pad_power_off()
669 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
671 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
673 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_off()
674 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
676 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
677 clk_disable_unprepare(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_off()
685 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_on() local
686 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_pad_power_on()
688 struct device *dev = padctl->dev; in tegra186_utmi_pad_power_on()
689 unsigned int index = lane->index; in tegra186_utmi_pad_power_on()
695 mutex_lock(&padctl->lock); in tegra186_utmi_pad_power_on()
696 if (test_bit(index, priv->utmi_pad_enabled)) { in tegra186_utmi_pad_power_on()
697 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
701 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_pad_power_on()
704 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
710 tegra186_utmi_bias_pad_power_on(padctl); in tegra186_utmi_pad_power_on()
714 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
716 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
718 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
720 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
722 set_bit(index, priv->utmi_pad_enabled); in tegra186_utmi_pad_power_on()
723 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
729 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_down() local
730 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_pad_power_down()
731 unsigned int index = lane->index; in tegra186_utmi_pad_power_down()
737 mutex_lock(&padctl->lock); in tegra186_utmi_pad_power_down()
738 if (!test_bit(index, priv->utmi_pad_enabled)) { in tegra186_utmi_pad_power_down()
739 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_down()
743 dev_dbg(padctl->dev, "power down UTMI pad %u\n", index); in tegra186_utmi_pad_power_down()
745 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
747 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
749 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
751 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
755 clear_bit(index, priv->utmi_pad_enabled); in tegra186_utmi_pad_power_down()
757 tegra186_utmi_bias_pad_power_off(padctl); in tegra186_utmi_pad_power_down()
759 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_down()
762 static int tegra186_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl, in tegra186_xusb_padctl_vbus_override() argument
767 dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_vbus_override()
769 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
779 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
784 static int tegra186_xusb_padctl_id_override(struct tegra_xusb_padctl *padctl, in tegra186_xusb_padctl_id_override() argument
789 dev_dbg(padctl->dev, "%s id override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_id_override()
791 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
796 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
799 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
809 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
818 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_set_mode() local
819 struct tegra_xusb_usb2_port *port = tegra_xusb_find_usb2_port(padctl, in tegra186_utmi_phy_set_mode()
820 lane->index); in tegra186_utmi_phy_set_mode()
823 mutex_lock(&padctl->lock); in tegra186_utmi_phy_set_mode()
825 dev_dbg(&port->base.dev, "%s: mode %d", __func__, mode); in tegra186_utmi_phy_set_mode()
829 tegra186_xusb_padctl_id_override(padctl, true); in tegra186_utmi_phy_set_mode()
831 err = regulator_enable(port->supply); in tegra186_utmi_phy_set_mode()
833 tegra186_xusb_padctl_vbus_override(padctl, true); in tegra186_utmi_phy_set_mode()
840 if (regulator_is_enabled(port->supply)) in tegra186_utmi_phy_set_mode()
841 regulator_disable(port->supply); in tegra186_utmi_phy_set_mode()
843 tegra186_xusb_padctl_id_override(padctl, false); in tegra186_utmi_phy_set_mode()
844 tegra186_xusb_padctl_vbus_override(padctl, false); in tegra186_utmi_phy_set_mode()
848 mutex_unlock(&padctl->lock); in tegra186_utmi_phy_set_mode()
857 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_power_on() local
858 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_phy_power_on()
860 unsigned int index = lane->index; in tegra186_utmi_phy_power_on()
861 struct device *dev = padctl->dev; in tegra186_utmi_phy_power_on()
864 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_phy_power_on()
867 return -ENODEV; in tegra186_utmi_phy_power_on()
870 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
873 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
875 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
878 if (port->mode == USB_DR_MODE_UNKNOWN) in tegra186_utmi_phy_power_on()
880 else if (port->mode == USB_DR_MODE_PERIPHERAL) in tegra186_utmi_phy_power_on()
882 else if (port->mode == USB_DR_MODE_HOST) in tegra186_utmi_phy_power_on()
884 else if (port->mode == USB_DR_MODE_OTG) in tegra186_utmi_phy_power_on()
887 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
889 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
894 if (usb2->hs_curr_level_offset) { in tegra186_utmi_phy_power_on()
897 hs_current_level = (int)priv->calib.hs_curr_level[index] + in tegra186_utmi_phy_power_on()
898 usb2->hs_curr_level_offset; in tegra186_utmi_phy_power_on()
907 value |= HS_CURR_LEVEL(priv->calib.hs_curr_level[index]); in tegra186_utmi_phy_power_on()
910 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
912 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
914 value |= TERM_RANGE_ADJ(priv->calib.hs_term_range_adj); in tegra186_utmi_phy_power_on()
916 value |= RPD_CTRL(priv->calib.rpd_ctrl); in tegra186_utmi_phy_power_on()
917 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
934 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_init() local
936 unsigned int index = lane->index; in tegra186_utmi_phy_init()
937 struct device *dev = padctl->dev; in tegra186_utmi_phy_init()
941 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_phy_init()
944 return -ENODEV; in tegra186_utmi_phy_init()
947 if (port->mode == USB_DR_MODE_OTG || in tegra186_utmi_phy_init()
948 port->mode == USB_DR_MODE_PERIPHERAL) { in tegra186_utmi_phy_init()
950 reg = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_utmi_phy_init()
954 padctl_writel(padctl, reg, USB2_VBUS_ID); in tegra186_utmi_phy_init()
957 if (port->supply && port->mode == USB_DR_MODE_HOST) { in tegra186_utmi_phy_init()
958 err = regulator_enable(port->supply); in tegra186_utmi_phy_init()
972 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_exit() local
974 unsigned int index = lane->index; in tegra186_utmi_phy_exit()
975 struct device *dev = padctl->dev; in tegra186_utmi_phy_exit()
978 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_phy_exit()
981 return -ENODEV; in tegra186_utmi_phy_exit()
984 if (port->supply && port->mode == USB_DR_MODE_HOST) { in tegra186_utmi_phy_exit()
985 err = regulator_disable(port->supply); in tegra186_utmi_phy_exit()
1006 tegra186_usb2_pad_probe(struct tegra_xusb_padctl *padctl, in tegra186_usb2_pad_probe() argument
1010 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_usb2_pad_probe()
1017 return ERR_PTR(-ENOMEM); in tegra186_usb2_pad_probe()
1019 pad = &usb2->base; in tegra186_usb2_pad_probe()
1020 pad->ops = &tegra186_usb2_lane_ops; in tegra186_usb2_pad_probe()
1021 pad->soc = soc; in tegra186_usb2_pad_probe()
1023 err = tegra_xusb_pad_init(pad, padctl, np); in tegra186_usb2_pad_probe()
1029 priv->usb2_trk_clk = devm_clk_get(&pad->dev, "trk"); in tegra186_usb2_pad_probe()
1030 if (IS_ERR(priv->usb2_trk_clk)) { in tegra186_usb2_pad_probe()
1031 err = PTR_ERR(priv->usb2_trk_clk); in tegra186_usb2_pad_probe()
1032 dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err); in tegra186_usb2_pad_probe()
1040 dev_set_drvdata(&pad->dev, pad); in tegra186_usb2_pad_probe()
1045 device_unregister(&pad->dev); in tegra186_usb2_pad_probe()
1063 "xusb",
1078 return tegra_xusb_find_lane(port->padctl, "usb2", port->index); in tegra186_usb2_port_map()
1099 return ERR_PTR(-ENOMEM); in tegra186_usb3_lane_probe()
1101 INIT_LIST_HEAD(&usb3->base.list); in tegra186_usb3_lane_probe()
1102 usb3->base.soc = &pad->soc->lanes[index]; in tegra186_usb3_lane_probe()
1103 usb3->base.index = index; in tegra186_usb3_lane_probe()
1104 usb3->base.pad = pad; in tegra186_usb3_lane_probe()
1105 usb3->base.np = np; in tegra186_usb3_lane_probe()
1107 err = tegra_xusb_lane_parse_dt(&usb3->base, np); in tegra186_usb3_lane_probe()
1113 return &usb3->base; in tegra186_usb3_lane_probe()
1126 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_sleepwalk() local
1127 unsigned int index = lane->index; in tegra186_usb3_enable_phy_sleepwalk()
1130 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1132 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1134 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1138 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1140 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1144 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1151 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_sleepwalk() local
1152 unsigned int index = lane->index; in tegra186_usb3_disable_phy_sleepwalk()
1155 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1157 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1159 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1163 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1165 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1167 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1174 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_wake() local
1175 unsigned int index = lane->index; in tegra186_usb3_enable_phy_wake()
1178 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1180 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1183 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1187 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1190 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1192 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1199 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_wake() local
1200 unsigned int index = lane->index; in tegra186_usb3_disable_phy_wake()
1203 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1205 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1208 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1212 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1215 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1217 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1224 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_remote_wake_detected() local
1225 unsigned int index = lane->index; in tegra186_usb3_phy_remote_wake_detected()
1228 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_phy_remote_wake_detected()
1257 return tegra_xusb_find_lane(port->padctl, "usb3", port->index); in tegra186_usb3_port_map()
1270 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_on() local
1273 unsigned int index = lane->index; in tegra186_usb3_phy_power_on()
1274 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_on()
1277 port = tegra_xusb_find_usb3_port(padctl, index); in tegra186_usb3_phy_power_on()
1280 return -ENODEV; in tegra186_usb3_phy_power_on()
1283 usb2 = tegra_xusb_find_usb2_port(padctl, port->port); in tegra186_usb3_phy_power_on()
1287 return -ENODEV; in tegra186_usb3_phy_power_on()
1290 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_on()
1292 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1295 if (usb2->mode == USB_DR_MODE_UNKNOWN) in tegra186_usb3_phy_power_on()
1297 else if (usb2->mode == USB_DR_MODE_PERIPHERAL) in tegra186_usb3_phy_power_on()
1299 else if (usb2->mode == USB_DR_MODE_HOST) in tegra186_usb3_phy_power_on()
1301 else if (usb2->mode == USB_DR_MODE_OTG) in tegra186_usb3_phy_power_on()
1304 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1306 if (padctl->soc->supports_gen2 && port->disable_gen2) { in tegra186_usb3_phy_power_on()
1307 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1312 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1315 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1317 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1321 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1323 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1327 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1329 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1331 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_on()
1339 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_off() local
1341 unsigned int index = lane->index; in tegra186_usb3_phy_power_off()
1342 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_off()
1345 port = tegra_xusb_find_usb3_port(padctl, index); in tegra186_usb3_phy_power_off()
1348 return -ENODEV; in tegra186_usb3_phy_power_off()
1351 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_off()
1353 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1355 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1359 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1361 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1365 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1367 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1369 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_off()
1393 tegra186_usb3_pad_probe(struct tegra_xusb_padctl *padctl, in tegra186_usb3_pad_probe() argument
1403 return ERR_PTR(-ENOMEM); in tegra186_usb3_pad_probe()
1405 pad = &usb3->base; in tegra186_usb3_pad_probe()
1406 pad->ops = &tegra186_usb3_lane_ops; in tegra186_usb3_pad_probe()
1407 pad->soc = soc; in tegra186_usb3_pad_probe()
1409 err = tegra_xusb_pad_init(pad, padctl, np); in tegra186_usb3_pad_probe()
1419 dev_set_drvdata(&pad->dev, pad); in tegra186_usb3_pad_probe()
1424 device_unregister(&pad->dev); in tegra186_usb3_pad_probe()
1442 "xusb",
1446 tegra186_xusb_read_fuse_calibration(struct tegra186_xusb_padctl *padctl) in tegra186_xusb_read_fuse_calibration() argument
1448 struct device *dev = padctl->base.dev; in tegra186_xusb_read_fuse_calibration()
1453 count = padctl->base.soc->ports.usb2.count; in tegra186_xusb_read_fuse_calibration()
1457 return -ENOMEM; in tegra186_xusb_read_fuse_calibration()
1470 padctl->calib.hs_curr_level = level; in tegra186_xusb_read_fuse_calibration()
1472 padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1474 padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1485 padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK; in tegra186_xusb_read_fuse_calibration()
1501 return ERR_PTR(-ENOMEM); in tegra186_xusb_padctl_probe()
1503 priv->base.dev = dev; in tegra186_xusb_padctl_probe()
1504 priv->base.soc = soc; in tegra186_xusb_padctl_probe()
1507 priv->ao_regs = devm_ioremap_resource(dev, res); in tegra186_xusb_padctl_probe()
1508 if (IS_ERR(priv->ao_regs)) in tegra186_xusb_padctl_probe()
1509 return ERR_CAST(priv->ao_regs); in tegra186_xusb_padctl_probe()
1515 return &priv->base; in tegra186_xusb_padctl_probe()
1518 static void tegra186_xusb_padctl_save(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_save() argument
1520 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_xusb_padctl_save()
1522 priv->context.vbus_id = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_save()
1523 priv->context.usb2_pad_mux = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_save()
1524 priv->context.usb2_port_cap = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_save()
1525 priv->context.ss_port_cap = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_save()
1528 static void tegra186_xusb_padctl_restore(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_restore() argument
1530 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_xusb_padctl_restore()
1532 padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_restore()
1533 padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_restore()
1534 padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_restore()
1535 padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID); in tegra186_xusb_padctl_restore()
1538 static int tegra186_xusb_padctl_suspend_noirq(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_suspend_noirq() argument
1540 tegra186_xusb_padctl_save(padctl); in tegra186_xusb_padctl_suspend_noirq()
1545 static int tegra186_xusb_padctl_resume_noirq(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_resume_noirq() argument
1547 tegra186_xusb_padctl_restore(padctl); in tegra186_xusb_padctl_resume_noirq()
1552 static void tegra186_xusb_padctl_remove(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_remove() argument
1568 "avdd-pll-erefeut",
1569 "avdd-usb",
1570 "vclamp-usb",
1571 "vddio-hsic",
1575 TEGRA186_LANE("usb2-0", 0, 0, 0, usb2),
1576 TEGRA186_LANE("usb2-1", 0, 0, 0, usb2),
1577 TEGRA186_LANE("usb2-2", 0, 0, 0, usb2),
1588 TEGRA186_LANE("usb3-0", 0, 0, 0, usb3),
1589 TEGRA186_LANE("usb3-1", 0, 0, 0, usb3),
1590 TEGRA186_LANE("usb3-2", 0, 0, 0, usb3),
1637 "avdd-usb",
1638 "vclamp-usb",
1642 TEGRA186_LANE("usb2-0", 0, 0, 0, usb2),
1643 TEGRA186_LANE("usb2-1", 0, 0, 0, usb2),
1644 TEGRA186_LANE("usb2-2", 0, 0, 0, usb2),
1645 TEGRA186_LANE("usb2-3", 0, 0, 0, usb2),
1656 TEGRA186_LANE("usb3-0", 0, 0, 0, usb3),
1657 TEGRA186_LANE("usb3-1", 0, 0, 0, usb3),
1658 TEGRA186_LANE("usb3-2", 0, 0, 0, usb3),
1659 TEGRA186_LANE("usb3-3", 0, 0, 0, usb3),
1720 MODULE_DESCRIPTION("NVIDIA Tegra186 XUSB Pad Controller driver");