Lines Matching full:padctl
31 /* XUSB PADCTL registers */
276 /* padctl context */
291 to_tegra186_xusb_padctl(struct tegra_xusb_padctl *padctl) in to_tegra186_xusb_padctl() argument
293 return container_of(padctl, struct tegra186_xusb_padctl, base); in to_tegra186_xusb_padctl()
333 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_sleepwalk() local
334 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_enable_phy_sleepwalk()
338 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
430 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
439 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
474 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
481 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_sleepwalk() local
482 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_disable_phy_sleepwalk()
486 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
505 if (padctl->soc->supports_lp_cfg_en) { in tegra186_utmi_disable_phy_sleepwalk()
522 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
529 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_wake() local
533 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
535 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
538 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
542 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
545 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_enable_phy_wake()
547 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
554 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_wake() local
558 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
560 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
563 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
567 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
570 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_disable_phy_wake()
572 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
579 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_remote_wake_detected() local
583 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_utmi_phy_remote_wake_detected()
601 static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl) in tegra186_utmi_bias_pad_power_on() argument
603 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_bias_pad_power_on()
604 struct device *dev = padctl->dev; in tegra186_utmi_bias_pad_power_on()
615 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
620 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
622 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
626 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0); in tegra186_utmi_bias_pad_power_on()
630 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
632 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
634 if (padctl->soc->poll_trk_completed) { in tegra186_utmi_bias_pad_power_on()
635 err = padctl_readl_poll(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1, in tegra186_utmi_bias_pad_power_on()
644 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
646 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_on()
651 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_on()
652 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
655 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_on()
661 static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl) in tegra186_utmi_bias_pad_power_off() argument
663 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_bias_pad_power_off()
669 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
671 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); in tegra186_utmi_bias_pad_power_off()
673 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_off()
674 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
676 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL2); in tegra186_utmi_bias_pad_power_off()
685 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_on() local
686 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_pad_power_on()
688 struct device *dev = padctl->dev; in tegra186_utmi_pad_power_on()
695 mutex_lock(&padctl->lock); in tegra186_utmi_pad_power_on()
697 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
701 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_pad_power_on()
704 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
710 tegra186_utmi_bias_pad_power_on(padctl); in tegra186_utmi_pad_power_on()
714 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
716 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_on()
718 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
720 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_on()
723 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_on()
729 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_down() local
730 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_pad_power_down()
737 mutex_lock(&padctl->lock); in tegra186_utmi_pad_power_down()
739 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_down()
743 dev_dbg(padctl->dev, "power down UTMI pad %u\n", index); in tegra186_utmi_pad_power_down()
745 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
747 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_pad_power_down()
749 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
751 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_pad_power_down()
757 tegra186_utmi_bias_pad_power_off(padctl); in tegra186_utmi_pad_power_down()
759 mutex_unlock(&padctl->lock); in tegra186_utmi_pad_power_down()
762 static int tegra186_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl, in tegra186_xusb_padctl_vbus_override() argument
767 dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_vbus_override()
769 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
779 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_vbus_override()
784 static int tegra186_xusb_padctl_id_override(struct tegra_xusb_padctl *padctl, in tegra186_xusb_padctl_id_override() argument
789 dev_dbg(padctl->dev, "%s id override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_id_override()
791 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
796 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
799 value = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
809 padctl_writel(padctl, value, USB2_VBUS_ID); in tegra186_xusb_padctl_id_override()
818 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_set_mode() local
819 struct tegra_xusb_usb2_port *port = tegra_xusb_find_usb2_port(padctl, in tegra186_utmi_phy_set_mode()
823 mutex_lock(&padctl->lock); in tegra186_utmi_phy_set_mode()
829 tegra186_xusb_padctl_id_override(padctl, true); in tegra186_utmi_phy_set_mode()
833 tegra186_xusb_padctl_vbus_override(padctl, true); in tegra186_utmi_phy_set_mode()
843 tegra186_xusb_padctl_id_override(padctl, false); in tegra186_utmi_phy_set_mode()
844 tegra186_xusb_padctl_vbus_override(padctl, false); in tegra186_utmi_phy_set_mode()
848 mutex_unlock(&padctl->lock); in tegra186_utmi_phy_set_mode()
857 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_power_on() local
858 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_utmi_phy_power_on()
861 struct device *dev = padctl->dev; in tegra186_utmi_phy_power_on()
864 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_phy_power_on()
870 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
873 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_utmi_phy_power_on()
875 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
887 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_utmi_phy_power_on()
889 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
910 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); in tegra186_utmi_phy_power_on()
912 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
917 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); in tegra186_utmi_phy_power_on()
934 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_init() local
937 struct device *dev = padctl->dev; in tegra186_utmi_phy_init()
941 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_phy_init()
950 reg = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_utmi_phy_init()
954 padctl_writel(padctl, reg, USB2_VBUS_ID); in tegra186_utmi_phy_init()
972 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_exit() local
975 struct device *dev = padctl->dev; in tegra186_utmi_phy_exit()
978 port = tegra_xusb_find_usb2_port(padctl, index); in tegra186_utmi_phy_exit()
1006 tegra186_usb2_pad_probe(struct tegra_xusb_padctl *padctl, in tegra186_usb2_pad_probe() argument
1010 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_usb2_pad_probe()
1023 err = tegra_xusb_pad_init(pad, padctl, np); in tegra186_usb2_pad_probe()
1078 return tegra_xusb_find_lane(port->padctl, "usb2", port->index); in tegra186_usb2_port_map()
1126 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_sleepwalk() local
1130 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1132 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1134 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1138 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1140 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_enable_phy_sleepwalk()
1144 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1151 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_sleepwalk() local
1155 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1157 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1159 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1163 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1165 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_disable_phy_sleepwalk()
1167 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1174 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_wake() local
1178 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1180 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1183 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1187 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1190 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_enable_phy_wake()
1192 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1199 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_wake() local
1203 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1205 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1208 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1212 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1215 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_disable_phy_wake()
1217 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1224 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_remote_wake_detected() local
1228 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra186_usb3_phy_remote_wake_detected()
1257 return tegra_xusb_find_lane(port->padctl, "usb3", port->index); in tegra186_usb3_port_map()
1270 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_on() local
1274 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_on()
1277 port = tegra_xusb_find_usb3_port(padctl, index); in tegra186_usb3_phy_power_on()
1283 usb2 = tegra_xusb_find_usb2_port(padctl, port->port); in tegra186_usb3_phy_power_on()
1290 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_on()
1292 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1304 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP); in tegra186_usb3_phy_power_on()
1306 if (padctl->soc->supports_gen2 && port->disable_gen2) { in tegra186_usb3_phy_power_on()
1307 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1312 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG); in tegra186_usb3_phy_power_on()
1315 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1317 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1321 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1323 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1327 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1329 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_on()
1331 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_on()
1339 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_off() local
1342 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_off()
1345 port = tegra_xusb_find_usb3_port(padctl, index); in tegra186_usb3_phy_power_off()
1351 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_off()
1353 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1355 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1359 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1361 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1365 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1367 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1); in tegra186_usb3_phy_power_off()
1369 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_off()
1393 tegra186_usb3_pad_probe(struct tegra_xusb_padctl *padctl, in tegra186_usb3_pad_probe() argument
1409 err = tegra_xusb_pad_init(pad, padctl, np); in tegra186_usb3_pad_probe()
1446 tegra186_xusb_read_fuse_calibration(struct tegra186_xusb_padctl *padctl) in tegra186_xusb_read_fuse_calibration() argument
1448 struct device *dev = padctl->base.dev; in tegra186_xusb_read_fuse_calibration()
1453 count = padctl->base.soc->ports.usb2.count; in tegra186_xusb_read_fuse_calibration()
1470 padctl->calib.hs_curr_level = level; in tegra186_xusb_read_fuse_calibration()
1472 padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1474 padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1485 padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK; in tegra186_xusb_read_fuse_calibration()
1518 static void tegra186_xusb_padctl_save(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_save() argument
1520 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_xusb_padctl_save()
1522 priv->context.vbus_id = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_save()
1523 priv->context.usb2_pad_mux = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_save()
1524 priv->context.usb2_port_cap = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_save()
1525 priv->context.ss_port_cap = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_save()
1528 static void tegra186_xusb_padctl_restore(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_restore() argument
1530 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); in tegra186_xusb_padctl_restore()
1532 padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_restore()
1533 padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_restore()
1534 padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_restore()
1535 padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID); in tegra186_xusb_padctl_restore()
1538 static int tegra186_xusb_padctl_suspend_noirq(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_suspend_noirq() argument
1540 tegra186_xusb_padctl_save(padctl); in tegra186_xusb_padctl_suspend_noirq()
1545 static int tegra186_xusb_padctl_resume_noirq(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_resume_noirq() argument
1547 tegra186_xusb_padctl_restore(padctl); in tegra186_xusb_padctl_resume_noirq()
1552 static void tegra186_xusb_padctl_remove(struct tegra_xusb_padctl *padctl) in tegra186_xusb_padctl_remove() argument