Lines Matching +full:0 +full:x2000
22 #define PCL_PHY_CLKCTRL 0x0000
26 #define PCL_PHY_TEST_I 0x2000
29 #define TESTI_WR_EN BIT(0)
32 #define PCL_PHY_TEST_O 0x2004
33 #define TESTO_DAT_MASK GENMASK(7, 0)
35 #define PCL_PHY_RESET 0x200c
37 #define PCL_PHY_RESET_N BIT(0) /* =1:deasssert */
40 #define SG_USBPCIESEL 0x590
41 #define SG_USBPCIESEL_PCIE BIT(0)
44 #define SC_US3SRCSEL 0x2244
47 #define PCL_PHY_R00 0
50 #define RX_EQ_ADJ GENMASK(5, 0) /* EQ adjustment value */
51 #define RX_EQ_ADJ_VAL 0
57 #define VCOPLL_CLMP_VAL 0
171 return 0; in uniphier_pciephy_init()
173 for (id = 0; id < (priv->data->is_dual_phy ? 2 : 1); id++) { in uniphier_pciephy_init()
188 return 0; in uniphier_pciephy_init()
211 return 0; in uniphier_pciephy_exit()
238 priv->base = devm_platform_ioremap_resource(pdev, 0); in uniphier_pciephy_probe()