Lines Matching +full:tune +full:- +full:squelch +full:- +full:level
1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <linux/soc/samsung/exynos-regs-pmu.h>
196 /* Exynos9 - GS101 */
329 #define for_each_phy_tune(tune) \ argument
330 for (; (tune)->region != PTR_INVALID; ++(tune))
384 * struct exynos5_usbdrd_phy - driver data for USB 3.0 PHY
391 * @drv_data: pointer to SoC level driver data structure
399 * @orientation: TypeC connector orientation - normal or flipped
428 phys[(inst)->index]); in to_usbdrd_phy()
465 return -EINVAL; in exynos5_rate_to_clk()
476 if (!inst->reg_pmu) in exynos5_usbdrd_phy_isol()
481 regmap_update_bits(inst->reg_pmu, inst->pmu_offset, in exynos5_usbdrd_phy_isol()
497 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_pipe3_set_refclk()
507 switch (phy_drd->extrefclk) { in exynos5_usbdrd_pipe3_set_refclk()
525 dev_dbg(phy_drd->dev, "unsupported ref clk\n"); in exynos5_usbdrd_pipe3_set_refclk()
543 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_utmi_set_refclk()
551 reg |= PHYCLKRST_FSEL(phy_drd->extrefclk); in exynos5_usbdrd_utmi_set_refclk()
560 const struct exynos5_usbdrd_phy_tuning *tune; in exynos5_usbdrd_apply_phy_tunes() local
562 tune = phy_drd->drv_data->phy_tunes[state]; in exynos5_usbdrd_apply_phy_tunes()
563 if (!tune) in exynos5_usbdrd_apply_phy_tunes()
566 for_each_phy_tune(tune) { in exynos5_usbdrd_apply_phy_tunes()
570 switch (tune->region) { in exynos5_usbdrd_apply_phy_tunes()
572 reg_base = phy_drd->reg_phy; in exynos5_usbdrd_apply_phy_tunes()
575 reg_base = phy_drd->reg_pcs; in exynos5_usbdrd_apply_phy_tunes()
578 reg_base = phy_drd->reg_pma; in exynos5_usbdrd_apply_phy_tunes()
581 dev_warn_once(phy_drd->dev, in exynos5_usbdrd_apply_phy_tunes()
582 "unknown phy region %d\n", tune->region); in exynos5_usbdrd_apply_phy_tunes()
586 if (~tune->mask) { in exynos5_usbdrd_apply_phy_tunes()
587 reg = readl(reg_base + tune->off); in exynos5_usbdrd_apply_phy_tunes()
588 reg &= ~tune->mask; in exynos5_usbdrd_apply_phy_tunes()
590 reg |= tune->val; in exynos5_usbdrd_apply_phy_tunes()
591 writel(reg, reg_base + tune->off); in exynos5_usbdrd_apply_phy_tunes()
599 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1); in exynos5_usbdrd_pipe3_init()
600 /* Set Tx De-Emphasis level */ in exynos5_usbdrd_pipe3_init()
603 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1); in exynos5_usbdrd_pipe3_init()
605 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_pipe3_init()
607 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_pipe3_init()
613 void __iomem *regs_base = phy_drd->reg_phy; in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
657 void __iomem *regs_base = phy_drd->reg_pma; in exynos5_usbdrd_usbdp_g2_v4_pma_lane_mux_sel()
668 ((phy_drd->orientation == TYPEC_ORIENTATION_NORMAL) in exynos5_usbdrd_usbdp_g2_v4_pma_lane_mux_sel()
677 if (phy_drd->orientation == TYPEC_ORIENTATION_NORMAL) { in exynos5_usbdrd_usbdp_g2_v4_pma_lane_mux_sel()
688 if (phy_drd->orientation == TYPEC_ORIENTATION_NORMAL) { in exynos5_usbdrd_usbdp_g2_v4_pma_lane_mux_sel()
709 phy_drd->reg_pma + EXYNOS9_PMA_USBDP_CMN_REG01C0, in exynos5_usbdrd_usbdp_g2_v4_pma_check_pll_lock()
712 dev_err(phy_drd->dev, in exynos5_usbdrd_usbdp_g2_v4_pma_check_pll_lock()
733 (phy_drd->reg_pma in exynos5_usbdrd_usbdp_g2_v4_pma_check_cdr_lock()
734 + ((phy_drd->orientation == TYPEC_ORIENTATION_NORMAL) in exynos5_usbdrd_usbdp_g2_v4_pma_check_cdr_lock()
739 dev_err(phy_drd->dev, in exynos5_usbdrd_usbdp_g2_v4_pma_check_cdr_lock()
741 ((phy_drd->orientation == TYPEC_ORIENTATION_NORMAL) in exynos5_usbdrd_usbdp_g2_v4_pma_check_cdr_lock()
750 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0); in exynos5_usbdrd_utmi_init()
751 /* Set Loss-of-Signal Detector sensitivity */ in exynos5_usbdrd_utmi_init()
754 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0); in exynos5_usbdrd_utmi_init()
756 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1); in exynos5_usbdrd_utmi_init()
757 /* Set Tx De-Emphasis level */ in exynos5_usbdrd_utmi_init()
760 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1); in exynos5_usbdrd_utmi_init()
763 writel(PHYUTMI_OTGDISABLE, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI); in exynos5_usbdrd_utmi_init()
765 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_utmi_init()
767 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_utmi_init()
777 ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos5_usbdrd_phy_init()
782 writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in exynos5_usbdrd_phy_init()
783 writel(0x0, phy_drd->reg_phy + EXYNOS5_DRD_PHYRESUME); in exynos5_usbdrd_phy_init()
791 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_LINKSYSTEM); in exynos5_usbdrd_phy_init()
793 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0); in exynos5_usbdrd_phy_init()
796 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM0); in exynos5_usbdrd_phy_init()
799 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMICLKSEL); in exynos5_usbdrd_phy_init()
801 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMICLKSEL); in exynos5_usbdrd_phy_init()
804 inst->phy_cfg->phy_init(phy_drd); in exynos5_usbdrd_phy_init()
807 reg = inst->phy_cfg->set_refclk(inst); in exynos5_usbdrd_phy_init()
820 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_phy_init()
825 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_phy_init()
827 clk_bulk_disable_unprepare(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos5_usbdrd_phy_init()
839 ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos5_usbdrd_phy_exit()
846 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYUTMI); in exynos5_usbdrd_phy_exit()
849 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_phy_exit()
853 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_phy_exit()
856 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_phy_exit()
859 writel(reg, phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_phy_exit()
861 clk_bulk_disable_unprepare(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos5_usbdrd_phy_exit()
872 dev_dbg(phy_drd->dev, "Request to power_on usbdrd_phy phy\n"); in exynos5_usbdrd_phy_power_on()
874 ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_core_clks, in exynos5_usbdrd_phy_power_on()
875 phy_drd->core_clks); in exynos5_usbdrd_phy_power_on()
880 ret = regulator_bulk_enable(phy_drd->drv_data->n_regulators, in exynos5_usbdrd_phy_power_on()
881 phy_drd->regulators); in exynos5_usbdrd_phy_power_on()
883 dev_err(phy_drd->dev, "Failed to enable PHY regulator(s)\n"); in exynos5_usbdrd_phy_power_on()
887 /* Power-on PHY */ in exynos5_usbdrd_phy_power_on()
888 inst->phy_cfg->phy_isol(inst, false); in exynos5_usbdrd_phy_power_on()
893 clk_bulk_disable_unprepare(phy_drd->drv_data->n_core_clks, in exynos5_usbdrd_phy_power_on()
894 phy_drd->core_clks); in exynos5_usbdrd_phy_power_on()
904 dev_dbg(phy_drd->dev, "Request to power_off usbdrd_phy phy\n"); in exynos5_usbdrd_phy_power_off()
906 /* Power-off the PHY */ in exynos5_usbdrd_phy_power_off()
907 inst->phy_cfg->phy_isol(inst, true); in exynos5_usbdrd_phy_power_off()
910 regulator_bulk_disable(phy_drd->drv_data->n_regulators, in exynos5_usbdrd_phy_power_off()
911 phy_drd->regulators); in exynos5_usbdrd_phy_power_off()
913 clk_bulk_disable_unprepare(phy_drd->drv_data->n_core_clks, in exynos5_usbdrd_phy_power_off()
914 phy_drd->core_clks); in exynos5_usbdrd_phy_power_off()
925 writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_handshake()
927 err = readl_poll_timeout(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1, in crport_handshake()
929 if (err == -ETIMEDOUT) { in crport_handshake()
930 dev_err(phy_drd->dev, "CRPORT handshake timeout1 (0x%08x)\n", val); in crport_handshake()
934 writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_handshake()
936 err = readl_poll_timeout(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1, in crport_handshake()
938 if (err == -ETIMEDOUT) { in crport_handshake()
939 dev_err(phy_drd->dev, "CRPORT handshake timeout2 (0x%08x)\n", val); in crport_handshake()
953 phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_ctrl_write()
961 phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); in crport_ctrl_write()
996 dev_err(phy_drd->dev, in exynos5420_usbdrd_phy_calibrate()
997 "Failed setting Loss-of-Signal level for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
1003 * to raise Tx signal level from its default value of (0x4) in exynos5420_usbdrd_phy_calibrate()
1010 dev_err(phy_drd->dev, in exynos5420_usbdrd_phy_calibrate()
1011 "Failed setting Tx-Vboost-Level for SuperSpeed\n"); in exynos5420_usbdrd_phy_calibrate()
1022 * e.g. Samsung SUM-TSB16S 3.0 USB drive. in exynos5420_usbdrd_phy_calibrate()
1024 switch (phy_drd->extrefclk) { in exynos5420_usbdrd_phy_calibrate()
1042 dev_err(phy_drd->dev, in exynos5420_usbdrd_phy_calibrate()
1053 if (WARN_ON(args->args[0] >= EXYNOS5_DRDPHYS_NUM)) in exynos5_usbdrd_phy_xlate()
1054 return ERR_PTR(-ENODEV); in exynos5_usbdrd_phy_xlate()
1056 return phy_drd->phys[args->args[0]].phy; in exynos5_usbdrd_phy_xlate()
1064 if (inst->phy_cfg->id == EXYNOS5_DRDPHY_UTMI) in exynos5_usbdrd_phy_calibrate()
1081 void __iomem *regs_base = phy_drd->reg_phy; in exynos5_usbdrd_usb_v3p1_pipe_override()
1098 void __iomem *regs_base = phy_drd->reg_phy; in exynos850_usbdrd_utmi_init()
1104 * QACTIVE signal in Q-Channel interface to HIGH level, to make sure in exynos850_usbdrd_utmi_init()
1135 /* Set VBUS Valid and D+ pull-up control by VBUS pad usage */ in exynos850_usbdrd_utmi_init()
1140 if (!phy_drd->sw) { in exynos850_usbdrd_utmi_init()
1152 switch (phy_drd->extrefclk) { in exynos850_usbdrd_utmi_init()
1169 dev_warn(phy_drd->dev, "unsupported ref clk: %#.2x\n", in exynos850_usbdrd_utmi_init()
1170 phy_drd->extrefclk); in exynos850_usbdrd_utmi_init()
1175 if (phy_drd->drv_data->phy_tunes) in exynos850_usbdrd_utmi_init()
1210 ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos850_usbdrd_phy_init()
1215 scoped_guard(mutex, &phy_drd->phy_mutex) in exynos850_usbdrd_phy_init()
1216 inst->phy_cfg->phy_init(phy_drd); in exynos850_usbdrd_phy_init()
1218 clk_bulk_disable_unprepare(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos850_usbdrd_phy_init()
1227 void __iomem *regs_base = phy_drd->reg_phy; in exynos850_usbdrd_phy_exit()
1231 ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos850_usbdrd_phy_exit()
1235 guard(mutex)(&phy_drd->phy_mutex); in exynos850_usbdrd_phy_exit()
1256 clk_bulk_disable_unprepare(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos850_usbdrd_phy_exit()
1271 void __iomem *regs_pma = phy_drd->reg_pma; in exynos5_usbdrd_gs101_pipe3_init()
1272 void __iomem *regs_phy = phy_drd->reg_phy; in exynos5_usbdrd_gs101_pipe3_init()
1305 if (inst->phy_cfg->id == EXYNOS5_DRDPHY_UTMI) { in exynos5_usbdrd_gs101_phy_init()
1306 /* Power-on PHY ... */ in exynos5_usbdrd_gs101_phy_init()
1307 ret = regulator_bulk_enable(phy_drd->drv_data->n_regulators, in exynos5_usbdrd_gs101_phy_init()
1308 phy_drd->regulators); in exynos5_usbdrd_gs101_phy_init()
1310 dev_err(phy_drd->dev, in exynos5_usbdrd_gs101_phy_init()
1330 if (inst->phy_cfg->id == EXYNOS5_DRDPHY_UTMI) { in exynos5_usbdrd_gs101_phy_exit()
1338 if (inst->phy_cfg->id != EXYNOS5_DRDPHY_UTMI) in exynos5_usbdrd_gs101_phy_exit()
1341 return regulator_bulk_disable(phy_drd->drv_data->n_regulators, in exynos5_usbdrd_gs101_phy_exit()
1342 phy_drd->regulators); in exynos5_usbdrd_gs101_phy_exit()
1357 phy_drd->clks = devm_kcalloc(phy_drd->dev, phy_drd->drv_data->n_clks, in exynos5_usbdrd_phy_clk_handle()
1358 sizeof(*phy_drd->clks), GFP_KERNEL); in exynos5_usbdrd_phy_clk_handle()
1359 if (!phy_drd->clks) in exynos5_usbdrd_phy_clk_handle()
1360 return -ENOMEM; in exynos5_usbdrd_phy_clk_handle()
1362 for (int i = 0; i < phy_drd->drv_data->n_clks; ++i) in exynos5_usbdrd_phy_clk_handle()
1363 phy_drd->clks[i].id = phy_drd->drv_data->clk_names[i]; in exynos5_usbdrd_phy_clk_handle()
1365 ret = devm_clk_bulk_get(phy_drd->dev, phy_drd->drv_data->n_clks, in exynos5_usbdrd_phy_clk_handle()
1366 phy_drd->clks); in exynos5_usbdrd_phy_clk_handle()
1368 return dev_err_probe(phy_drd->dev, ret, in exynos5_usbdrd_phy_clk_handle()
1371 phy_drd->core_clks = devm_kcalloc(phy_drd->dev, in exynos5_usbdrd_phy_clk_handle()
1372 phy_drd->drv_data->n_core_clks, in exynos5_usbdrd_phy_clk_handle()
1373 sizeof(*phy_drd->core_clks), in exynos5_usbdrd_phy_clk_handle()
1375 if (!phy_drd->core_clks) in exynos5_usbdrd_phy_clk_handle()
1376 return -ENOMEM; in exynos5_usbdrd_phy_clk_handle()
1378 for (int i = 0; i < phy_drd->drv_data->n_core_clks; ++i) in exynos5_usbdrd_phy_clk_handle()
1379 phy_drd->core_clks[i].id = phy_drd->drv_data->core_clk_names[i]; in exynos5_usbdrd_phy_clk_handle()
1381 ret = devm_clk_bulk_get(phy_drd->dev, phy_drd->drv_data->n_core_clks, in exynos5_usbdrd_phy_clk_handle()
1382 phy_drd->core_clks); in exynos5_usbdrd_phy_clk_handle()
1384 return dev_err_probe(phy_drd->dev, ret, in exynos5_usbdrd_phy_clk_handle()
1388 for (int i = 0; i < phy_drd->drv_data->n_core_clks; ++i) { in exynos5_usbdrd_phy_clk_handle()
1389 if (!strcmp(phy_drd->core_clks[i].id, "ref")) { in exynos5_usbdrd_phy_clk_handle()
1390 ref_clk = phy_drd->core_clks[i].clk; in exynos5_usbdrd_phy_clk_handle()
1395 return dev_err_probe(phy_drd->dev, -ENODEV, in exynos5_usbdrd_phy_clk_handle()
1399 ret = exynos5_rate_to_clk(ref_rate, &phy_drd->extrefclk); in exynos5_usbdrd_phy_clk_handle()
1401 return dev_err_probe(phy_drd->dev, ret, in exynos5_usbdrd_phy_clk_handle()
1414 ret = clk_bulk_prepare_enable(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos5_usbdrd_orien_sw_set()
1416 dev_err(phy_drd->dev, "Failed to enable PHY clocks(s)\n"); in exynos5_usbdrd_orien_sw_set()
1420 scoped_guard(mutex, &phy_drd->phy_mutex) { in exynos5_usbdrd_orien_sw_set()
1421 void __iomem * const regs_base = phy_drd->reg_phy; in exynos5_usbdrd_orien_sw_set()
1443 phy_drd->orientation = orientation; in exynos5_usbdrd_orien_sw_set()
1446 clk_bulk_disable(phy_drd->drv_data->n_clks, phy_drd->clks); in exynos5_usbdrd_orien_sw_set()
1455 typec_switch_unregister(phy_drd->sw); in exynos5_usbdrd_orien_switch_unregister()
1465 if (device_property_present(phy_drd->dev, "orientation-switch")) { in exynos5_usbdrd_setup_notifiers()
1469 sw_desc.fwnode = dev_fwnode(phy_drd->dev); in exynos5_usbdrd_setup_notifiers()
1472 phy_drd->sw = typec_switch_register(phy_drd->dev, &sw_desc); in exynos5_usbdrd_setup_notifiers()
1473 if (IS_ERR(phy_drd->sw)) in exynos5_usbdrd_setup_notifiers()
1474 return dev_err_probe(phy_drd->dev, in exynos5_usbdrd_setup_notifiers()
1475 PTR_ERR(phy_drd->sw), in exynos5_usbdrd_setup_notifiers()
1478 ret = devm_add_action_or_reset(phy_drd->dev, in exynos5_usbdrd_setup_notifiers()
1482 return dev_err_probe(phy_drd->dev, ret, in exynos5_usbdrd_setup_notifiers()
1525 "vbus", "vbus-boost",
1619 PHY_TUNING_ENTRY_PMA(0x0c8c, -1, 0xff),
1620 PHY_TUNING_ENTRY_PMA(0x1c8c, -1, 0xff),
1621 PHY_TUNING_ENTRY_PMA(0x0c9c, -1, 0x7d),
1622 PHY_TUNING_ENTRY_PMA(0x1c9c, -1, 0x7d),
1624 PHY_TUNING_ENTRY_PMA(0x0e7c, -1, 0x06),
1625 PHY_TUNING_ENTRY_PMA(0x09e0, -1, 0x00),
1626 PHY_TUNING_ENTRY_PMA(0x09e4, -1, 0x36),
1627 PHY_TUNING_ENTRY_PMA(0x1e7c, -1, 0x06),
1628 PHY_TUNING_ENTRY_PMA(0x19e0, -1, 0x00),
1629 PHY_TUNING_ENTRY_PMA(0x19e4, -1, 0x36),
1631 PHY_TUNING_ENTRY_PMA(0x1e90, -1, 0x02),
1632 PHY_TUNING_ENTRY_PMA(0x1e94, -1, 0x0b),
1634 PHY_TUNING_ENTRY_PMA(0x08f0, -1, 0x30),
1635 PHY_TUNING_ENTRY_PMA(0x18f0, -1, 0x30),
1637 PHY_TUNING_ENTRY_PMA(0x0a08, -1, 0x0c),
1638 PHY_TUNING_ENTRY_PMA(0x1a08, -1, 0x0c),
1640 PHY_TUNING_ENTRY_PMA(0x0a0c, -1, 0x05),
1641 PHY_TUNING_ENTRY_PMA(0x1a0c, -1, 0x05),
1643 PHY_TUNING_ENTRY_PMA(0x00f8, -1, 0x1c),
1644 PHY_TUNING_ENTRY_PMA(0x00fc, -1, 0x54),
1646 PHY_TUNING_ENTRY_PMA(0x104c, -1, 0x07),
1647 PHY_TUNING_ENTRY_PMA(0x204c, -1, 0x07),
1650 PHY_TUNING_ENTRY_PMA(0x0ca8, -1, 0x00),
1651 PHY_TUNING_ENTRY_PMA(0x0cac, -1, 0x04),
1652 PHY_TUNING_ENTRY_PMA(0x1ca8, -1, 0x00),
1653 PHY_TUNING_ENTRY_PMA(0x1cac, -1, 0x04),
1655 PHY_TUNING_ENTRY_PMA(0x0cb8, -1, 0x00),
1656 PHY_TUNING_ENTRY_PMA(0x0cbc, -1, 0x04),
1657 PHY_TUNING_ENTRY_PMA(0x1cb8, -1, 0x00),
1658 PHY_TUNING_ENTRY_PMA(0x1cbc, -1, 0x04),
1673 /* de-serializer enabled when U2 */
1676 /* TX Keeper Disable, Squelch on when U3 */
1679 PHY_TUNING_ENTRY_PCS(EXYNOS9_PCS_NS_VEC_PS1_N1, -1,
1683 PHY_TUNING_ENTRY_PCS(EXYNOS9_PCS_NS_VEC_PS2_N0, -1,
1689 PHY_TUNING_ENTRY_PCS(EXYNOS9_PCS_NS_VEC_PS3_N0, -1,
1695 PHY_TUNING_ENTRY_PCS(EXYNOS9_PCS_TIMEOUT_0, -1, 112),
1704 * increase pcs ts1 adding packet-cnt 1 --> 4
1706 * 19.6us(0x200) -> 15.3us(0x4)
1709 /* Gen1 Tx DRIVER pre-shoot, de-emphasis, level ctrl */
1716 /* Gen2 Tx DRIVER level ctrl */
1721 PHY_TUNING_ENTRY_PCS(EXYNOS9_PCS_TIMEOUT_3, -1, 4096),
1722 /* set skp_remove_th 0x2 -> 0x7 for avoiding retry problem. */
1731 /* Squelch off when U3 */
1750 "dvdd-usb20", "vddh-usb20", "vdd33-usb20",
1751 "vdda-usbdp", "vddh-usbdp",
1770 .compatible = "google,gs101-usb31drd-phy",
1773 .compatible = "samsung,exynos5250-usbdrd-phy",
1776 .compatible = "samsung,exynos5420-usbdrd-phy",
1779 .compatible = "samsung,exynos5433-usbdrd-phy",
1782 .compatible = "samsung,exynos7-usbdrd-phy",
1785 .compatible = "samsung,exynos850-usbdrd-phy",
1794 struct device *dev = &pdev->dev; in exynos5_usbdrd_phy_probe()
1795 struct device_node *node = dev->of_node; in exynos5_usbdrd_phy_probe()
1806 return -ENOMEM; in exynos5_usbdrd_phy_probe()
1809 phy_drd->dev = dev; in exynos5_usbdrd_phy_probe()
1813 return -EINVAL; in exynos5_usbdrd_phy_probe()
1814 phy_drd->drv_data = drv_data; in exynos5_usbdrd_phy_probe()
1816 ret = devm_mutex_init(dev, &phy_drd->phy_mutex); in exynos5_usbdrd_phy_probe()
1820 if (of_property_present(dev->of_node, "reg-names")) { in exynos5_usbdrd_phy_probe()
1826 phy_drd->reg_phy = reg; in exynos5_usbdrd_phy_probe()
1831 phy_drd->reg_pcs = reg; in exynos5_usbdrd_phy_probe()
1836 phy_drd->reg_pma = reg; in exynos5_usbdrd_phy_probe()
1839 phy_drd->reg_phy = devm_platform_ioremap_resource(pdev, 0); in exynos5_usbdrd_phy_probe()
1840 if (IS_ERR(phy_drd->reg_phy)) in exynos5_usbdrd_phy_probe()
1841 return PTR_ERR(phy_drd->reg_phy); in exynos5_usbdrd_phy_probe()
1848 reg_pmu = syscon_regmap_lookup_by_phandle(dev->of_node, in exynos5_usbdrd_phy_probe()
1849 "samsung,pmu-syscon"); in exynos5_usbdrd_phy_probe()
1861 dev_dbg(dev, "Not a multi-controller usbdrd phy\n"); in exynos5_usbdrd_phy_probe()
1864 phy_drd->regulators = devm_kcalloc(dev, in exynos5_usbdrd_phy_probe()
1865 drv_data->n_regulators, in exynos5_usbdrd_phy_probe()
1866 sizeof(*phy_drd->regulators), in exynos5_usbdrd_phy_probe()
1868 if (!phy_drd->regulators) in exynos5_usbdrd_phy_probe()
1869 return -ENOMEM; in exynos5_usbdrd_phy_probe()
1870 regulator_bulk_set_supply_names(phy_drd->regulators, in exynos5_usbdrd_phy_probe()
1871 drv_data->regulator_names, in exynos5_usbdrd_phy_probe()
1872 drv_data->n_regulators); in exynos5_usbdrd_phy_probe()
1873 ret = devm_regulator_bulk_get(dev, drv_data->n_regulators, in exynos5_usbdrd_phy_probe()
1874 phy_drd->regulators); in exynos5_usbdrd_phy_probe()
1885 struct phy *phy = devm_phy_create(dev, NULL, drv_data->phy_ops); in exynos5_usbdrd_phy_probe()
1891 phy_drd->phys[i].phy = phy; in exynos5_usbdrd_phy_probe()
1892 phy_drd->phys[i].index = i; in exynos5_usbdrd_phy_probe()
1893 phy_drd->phys[i].reg_pmu = reg_pmu; in exynos5_usbdrd_phy_probe()
1896 pmu_offset = drv_data->pmu_offset_usbdrd1_phy; in exynos5_usbdrd_phy_probe()
1900 pmu_offset = drv_data->pmu_offset_usbdrd0_phy; in exynos5_usbdrd_phy_probe()
1902 ->pmu_offset_usbdrd0_phy_ss) in exynos5_usbdrd_phy_probe()
1903 pmu_offset = drv_data->pmu_offset_usbdrd0_phy_ss; in exynos5_usbdrd_phy_probe()
1906 phy_drd->phys[i].pmu_offset = pmu_offset; in exynos5_usbdrd_phy_probe()
1907 phy_drd->phys[i].phy_cfg = &drv_data->phy_cfg[i]; in exynos5_usbdrd_phy_probe()
1908 phy_set_drvdata(phy, &phy_drd->phys[i]); in exynos5_usbdrd_phy_probe()
1914 return dev_err_probe(phy_drd->dev, PTR_ERR(phy_provider), in exynos5_usbdrd_phy_probe()