1 // SPDX-License-Identifier: GPL-2.0+
5  *      Guochun Huang <hero.huang@rock-chips.com>
8 #include <dt-bindings/phy/phy.h>
48 #define I_VBG_SEL_MASK		GENMASK(9, 8)
73  * The selection between the 400-based or 200-based values for REG_400M
87 #define REG_LP_400M_MASK	GENMASK(10, 8)
135 #define S_MASK			GENMASK(10, 8)
141 #define M_MASK			GENMASK(9, 0)
144 #define MRR_MASK		GENMASK(13, 8)
152 #define PLL_ENABLE_SEL		BIT(8)
168 #define EDGE_CON_DIR(x)		FIELD_PREP(BIT(9), x)
169 #define EDGE_CON_EN		BIT(8)
179 #define T_CLK_ZERO(x)		FIELD_PREP(GENMASK(15, 8), x)
182 #define T_HS_EXIT(x)		FIELD_PREP(GENMASK(15, 8), x)
187 #define T_ULPS_EXIT(x)		FIELD_PREP(GENMASK(9, 0), x)
191 #define SKEW_CAL_INIT_RUN_TIME(x)	FIELD_PREP(GENMASK(11, 8), x)
246 #define T_HS_ZERO(x)		FIELD_PREP(GENMASK(15, 8), x)
248 #define T_HS_EXIT(x)		FIELD_PREP(GENMASK(15, 8), x)
721 	{2660, 12,  47, 12, 12, 12, 21, 11,  9, 18, 14},
722 	{2650, 12,  46, 12, 11, 12, 21, 11,  9, 18, 14},
723 	{2640, 12,  46, 12, 11, 12, 21, 11,  9, 18, 14},
724 	{2630, 12,  46, 12, 11, 12, 21, 11,  9, 18, 14},
725 	{2620, 12,  46, 12, 11, 12, 21, 10,  9, 18, 14},
726 	{2610, 12,  45, 12, 11, 12, 21, 10,  9, 17, 14},
727 	{2600, 12,  45, 11, 11, 12, 21, 10,  9, 17, 14},
728 	{2590, 12,  45, 11, 11, 12, 20, 10,  9, 17, 14},
729 	{2580, 12,  45, 11, 11, 12, 20, 10,  9, 17, 14},
730 	{2570, 12,  44, 11, 11, 12, 20, 10,  9, 17, 13},
731 	{2560, 12,  44, 11, 11, 12, 20, 10,  9, 17, 13},
732 	{2550, 12,  44, 11, 11, 12, 20, 10,  9, 17, 13},
733 	{2540, 12,  44, 11, 11, 11, 21, 10,  9, 17, 13},
734 	{2530, 12,  44, 11, 11, 11, 21, 10,  9, 17, 13},
735 	{2520, 12,  43, 11, 11, 11, 21, 10,  9, 17, 13},
736 	{2510, 12,  43, 11, 11, 11, 20, 10,  9, 17, 13},
737 	{2500, 12,  43, 11, 11, 11, 20, 10,  9, 17, 13},
738 	{2490, 12,  43, 11, 11, 11, 20, 10,  9, 17, 13},
739 	{2480, 12,  42, 11, 11, 11, 20, 10,  9, 17, 13},
740 	{2470, 11,  43, 11, 11, 11, 20, 10,  9, 16, 13},
741 	{2460, 11,  43, 11, 11, 11, 20, 10,  9, 16, 13},
742 	{2450, 11,  43, 11, 11, 11, 20, 10,  9, 16, 13},
743 	{2440, 11,  42, 11, 11, 11, 19, 10,  9, 16, 13},
744 	{2430, 11,  42, 11, 11, 11, 19, 10,  9, 16, 13},
745 	{2420, 11,  42, 11, 10, 11, 19, 10,  9, 16, 13},
746 	{2410, 11,  42, 11, 10, 11, 19, 10,  9, 16, 12},
747 	{2400, 11,  41, 10, 10, 11, 19, 10,  8, 16, 12},
748 	{2390, 11,  41, 10, 10, 11, 19, 10,  8, 16, 12},
749 	{2380, 11,  41, 10, 10, 11, 19,  9,  8, 16, 12},
750 	{2370, 11,  41, 10, 10, 11, 18,  9,  8, 16, 12},
751 	{2360, 11,  41, 10, 10, 11, 18,  9,  8, 16, 12},
752 	{2350, 11,  40, 10, 10, 11, 18,  9,  8, 16, 12},
753 	{2340, 11,  40, 10, 10, 11, 18,  9,  8, 16, 12},
754 	{2330, 11,  40, 10, 10, 10, 19,  9,  8, 16, 12},
755 	{2320, 11,  40, 10, 10, 10, 19,  9,  8, 15, 12},
756 	{2310, 11,  39, 10, 10, 10, 19,  9,  8, 15, 12},
757 	{2300, 11,  39, 10, 10, 10, 18,  9,  8, 15, 12},
758 	{2290, 11,  39, 10, 10, 10, 18,  9,  8, 15, 12},
759 	{2280, 11,  39, 10, 10, 10, 18,  9,  8, 15, 12},
760 	{2270, 10,  39, 10, 10, 10, 18,  9,  8, 15, 12},
761 	{2260, 10,  39, 10, 10, 10, 18,  9,  8, 15, 12},
762 	{2250, 10,  39, 10, 10, 10, 18,  9,  8, 15, 12},
763 	{2240, 10,  39, 10, 10, 10, 18,  9,  8, 15, 11},
764 	{2230, 10,  38, 10, 10, 10, 18,  9,  8, 15, 11},
765 	{2220, 10,  38, 10, 10, 10, 17,  9,  8, 15, 11},
766 	{2210, 10,  38, 10, 10, 10, 17,  9,  8, 15, 11},
767 	{2200, 10,  38,  9, 10, 10, 17,  9,  8, 15, 11},
768 	{2190, 10,  38,  9,  9, 10, 17,  9,  8, 15, 11},
769 	{2180, 10,  37,  9,  9, 10, 17,  9,  8, 14, 11},
770 	{2170, 10,  37,  9,  9, 10, 17,  9,  8, 14, 11},
771 	{2160, 10,  37,  9,  9, 10, 17,  9,  8, 14, 11},
772 	{2150, 10,  37,  9,  9, 10, 16,  8,  8, 14, 11},
773 	{2140, 10,  36,  9,  9, 10, 16,  8,  8, 14, 11},
774 	{2130, 10,  36,  9,  9, 10, 16,  8,  7, 14, 11},
775 	{2120, 10,  36,  9,  9,  9, 17,  8,  7, 14, 11},
776 	{2110, 10,  36,  9,  9,  9, 17,  8,  7, 14, 11},
777 	{2100, 10,  35,  9,  9,  9, 17,  8,  7, 14, 11},
778 	{2090, 10,  35,  9,  9,  9, 17,  8,  7, 14, 11},
779 	{2080,  9,  36,  9,  9,  9, 16,  8,  7, 14, 11},
780 	{2070,  9,  36,  9,  9,  9, 16,  8,  7, 14, 10},
781 	{2060,  9,  35,  9,  9,  9, 16,  8,  7, 14, 10},
782 	{2050,  9,  35,  9,  9,  9, 16,  8,  7, 14, 10},
783 	{2040,  9,  35,  9,  9,  9, 16,  8,  7, 14, 10},
784 	{2030,  9,  35,  9,  9,  9, 16,  8,  7, 13, 10},
785 	{2020,  9,  35,  9,  9,  9, 16,  8,  7, 13, 10},
786 	{2010,  9,  34,  9,  9,  9, 15,  8,  7, 13, 10},
787 	{2000,  9,  34,  8,  9,  9, 15,  8,  7, 13, 10},
788 	{1990,  9,  34,  8,  9,  9, 15,  8,  7, 13, 10},
789 	{1980,  9,  34,  8,  9,  9, 15,  8,  7, 13, 10},
790 	{1970,  9,  33,  8,  9,  9, 15,  8,  7, 13, 10},
791 	{1960,  9,  33,  8,  9,  9, 15,  8,  7, 13, 10},
792 	{1950,  9,  33,  8,  8,  9, 15,  8,  7, 13, 10},
793 	{1940,  9,  33,  8,  8,  9, 15,  8,  7, 13, 10},
794 	{1930,  9,  32,  8,  8,  9, 14,  8,  7, 13, 10},
795 	{1920,  9,  32,  8,  8,  9, 14,  8,  7, 13, 10},
796 	{1910,  9,  32,  8,  8,  8, 15,  7,  7, 13,  9},
797 	{1900,  9,  32,  8,  8,  8, 15,  7,  7, 13,  9},
798 	{1890,  9,  31,  8,  8,  8, 15,  7,  7, 12,  9},
799 	{1880,  8,  32,  8,  8,  8, 15,  7,  7, 12,  9},
800 	{1870,  8,  32,  8,  8,  8, 15,  7,  7, 12,  9},
801 	{1860,  8,  32,  8,  8,  8, 14,  7,  6, 12,  9},
802 	{1850,  8,  32,  8,  8,  8, 14,  7,  6, 12,  9},
803 	{1840,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
804 	{1830,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
805 	{1820,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
806 	{1810,  8,  31,  8,  8,  8, 14,  7,  6, 12,  9},
807 	{1800,  8,  30,  7,  8,  8, 14,  7,  6, 12,  9},
808 	{1790,  8,  30,  7,  8,  8, 13,  7,  6, 12,  9},
809 	{1780,  8,  30,  7,  8,  8, 13,  7,  6, 12,  9},
810 	{1770,  8,  30,  7,  8,  8, 13,  7,  6, 12,  9},
811 	{1760,  8,  29,  7,  8,  8, 13,  7,  6, 12,  9},
812 	{1750,  8,  29,  7,  8,  8, 13,  7,  6, 12,  9},
813 	{1740,  8,  29,  7,  8,  8, 13,  7,  6, 11,  8},
814 	{1730,  8,  29,  7,  8,  8, 13,  7,  6, 11,  8},
815 	{1720,  8,  29,  7,  7,  8, 13,  7,  6, 11,  8},
816 	{1710,  8,  28,  7,  7,  8, 12,  7,  6, 11,  8},
817 	{1700,  8,  28,  7,  7,  7, 13,  7,  6, 11,  8},
818 	{1690,  8,  28,  7,  7,  7, 13,  7,  6, 11,  8},
819 	{1680,  7,  29,  7,  7,  7, 13,  6,  6, 11,  8},
820 	{1670,  7,  28,  7,  7,  7, 13,  6,  6, 11,  8},
821 	{1660,  7,  28,  7,  7,  7, 13,  6,  6, 11,  8},
822 	{1650,  7,  28,  7,  7,  7, 13,  6,  6, 11,  8},
823 	{1640,  7,  28,  7,  7,  7, 12,  6,  6, 11,  8},
824 	{1630,  7,  27,  7,  7,  7, 12,  6,  6, 11,  8},
825 	{1620,  7,  27,  7,  7,  7, 12,  6,  6, 11,  8},
826 	{1610,  7,  27,  7,  7,  7, 12,  6,  6, 11,  8},
827 	{1600,  7,  27,  6,  7,  7, 12,  6,  5, 10,  8},
828 	{1590,  7,  26,  6,  7,  7, 12,  6,  5, 10,  8},
838 	{1490, 59,  25,  6, 77, 59, 10, 70, 44,  9, 73},
839 	{1480, 59,  24,  6, 76, 58, 10, 70, 44,  9, 73},
840 	{1470, 58,  24,  6, 76, 58, 10, 69, 44,  9, 72},
841 	{1460, 58,  24,  6, 76, 58, 10, 69, 43,  9, 72},
842 	{1450, 58,  24,  6, 75, 57, 10, 68, 43,  9, 71},
843 	{1440, 57,  24,  6, 75, 57, 10, 68, 43,  9, 71},
844 	{1430, 57,  23,  6, 75, 57, 10, 68, 43,  8, 70},
845 	{1420, 56,  23,  6, 74, 57,  9, 67, 43,  8, 70},
846 	{1410, 56,  23,  6, 74, 57,  9, 67, 43,  8, 69},
847 	{1400, 56,  23,  5, 74, 55,  9, 67, 41,  8, 69},
848 	{1390, 55,  23,  5, 73, 55,  9, 66, 41,  8, 68},
849 	{1380, 55,  23,  5, 73, 54,  9, 66, 41,  8, 68},
850 	{1370, 54,  22,  5, 72, 54,  9, 66, 41,  8, 67},
851 	{1360, 54,  22,  5, 72, 54,  9, 65, 40,  8, 67},
852 	{1350, 54,  22,  5, 72, 53,  9, 65, 40,  8, 66},
853 	{1340, 53,  22,  5, 71, 53,  9, 65, 40,  8, 66},
854 	{1330, 53,  22,  5, 71, 53,  9, 64, 39,  8, 65},
855 	{1320, 52,  22,  5, 71, 53,  8, 64, 40,  8, 65},
856 	{1310, 52,  21,  5, 70, 53,  8, 64, 40,  8, 64},
857 	{1300, 51,  21,  5, 70, 51,  8, 63, 38,  8, 64},
858 	{1290, 51,  21,  5, 70, 51,  8, 63, 38,  7, 64},
859 	{1280, 51,  21,  5, 69, 51,  8, 63, 38,  7, 63},
860 	{1270, 50,  21,  5, 69, 50,  8, 62, 38,  7, 63},
861 	{1260, 50,  20,  5, 69, 50,  8, 62, 37,  7, 62},
862 	{1250, 49,  20,  5, 68, 49,  8, 62, 37,  7, 62},
863 	{1240, 49,  20,  5, 68, 49,  8, 61, 37,  7, 61},
864 	{1230, 49,  20,  5, 68, 49,  8, 61, 36,  7, 61},
865 	{1220, 48,  20,  5, 67, 48,  8, 61, 36,  7, 60},
921 	{ 660, 26,   9,  2, 48, 27,  3, 42, 19,  3, 33},
922 	{ 650, 25,   9,  2, 48, 26,  3, 41, 19,  3, 33},
923 	{ 640, 25,   9,  2, 48, 26,  2, 41, 19,  3, 32},
924 	{ 630, 24,   9,  2, 47, 26,  2, 40, 18,  3, 32},
925 	{ 620, 24,   9,  2, 47, 26,  2, 40, 19,  3, 31},
926 	{ 610, 24,   8,  2, 47, 26,  2, 40, 19,  3, 31},
927 	{ 600, 23,   8,  1, 46, 26,  2, 39, 18,  3, 30},
928 	{ 590, 23,   8,  1, 46, 24,  2, 39, 17,  3, 30},
929 	{ 580, 22,   8,  1, 46, 24,  2, 39, 17,  3, 29},
930 	{ 570, 22,   8,  1, 45, 23,  2, 38, 17,  3, 29},
954 	{ 330, 12,   3,  0, 37, 14,  0, 30,  9,  1, 17},
955 	{ 320, 12,   3,  0, 37, 14,  0, 30,  9,  1, 17},
956 	{ 310, 12,   3,  0, 36, 13,  0, 30,  9,  1, 16},
957 	{ 300, 11,   3,  0, 36, 13,  0, 29,  8,  1, 16},
958 	{ 290, 11,   2,  0, 36, 13,  0, 29,  8,  1, 15},
959 	{ 280, 10,   2,  0, 35, 12,  0, 29,  8,  1, 15},
960 	{ 270, 10,   2,  0, 35, 12,  0, 28,  8,  0, 14},
961 	{ 260,  9,   2,  0, 35, 12,  0, 28,  8,  0, 14},
962 	{ 250,  9,   2,  0, 34, 12,  0, 28,  8,  0, 14},
963 	{ 240,  9,   2,  0, 34, 12,  0, 27,  8,  0, 13},
964 	{ 230,  8,   1,  0, 34, 10,  0, 27,  6,  0, 13},
965 	{ 220,  8,   1,  0, 33, 10,  0, 27,  6,  0, 12},
967 	{ 200,  7,   1,  0, 33,  9,  0, 26,  5,  0, 11},
968 	{ 190,  7,   1,  0, 32,  9,  0, 25,  5,  0, 11},
969 	{ 180,  6,   1,  0, 32,  8,  0, 25,  5,  0, 10},
970 	{ 170,  6,   0,  0, 32,  8,  0, 25,  5,  0, 10},
971 	{ 160,  5,   0,  0, 31,  8,  0, 24,  4,  0,  9},
972 	{ 150,  5,   0,  0, 31,  8,  0, 24,  5,  0,  9},
973 	{ 140,  5,   0,  0, 31,  8,  0, 24,  5,  0,  8},
974 	{ 130,  4,   0,  0, 30,  6,  0, 23,  3,  0,  8},
984 	regmap_write(samsung->regmap, BIAS_CON0, I_DEV_DIV_6 | I_RES_100_2UA);  in samsung_mipi_dcphy_bias_block_enable()
985 	regmap_write(samsung->regmap, BIAS_CON1, I_VBG_SEL_820MV | I_BGR_VREF_820MV |  in samsung_mipi_dcphy_bias_block_enable()
987 	regmap_write(samsung->regmap, BIAS_CON2, REG_325M_325MV | REG_LP_400M_400MV |  in samsung_mipi_dcphy_bias_block_enable()
994 	regmap_update_bits(samsung->regmap, BIAS_CON4,  in samsung_mipi_dcphy_bias_block_enable()
1000 	regmap_write(samsung->regmap, DPHY_MC_GNR_CON1, T_PHY_READY(0x2000));  in samsung_mipi_dphy_lane_enable()
1001 	regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0,  in samsung_mipi_dphy_lane_enable()
1004 	switch (samsung->lanes) {  in samsung_mipi_dphy_lane_enable()
1006 		regmap_write(samsung->regmap, DPHY_MD3_GNR_CON1,  in samsung_mipi_dphy_lane_enable()
1008 		regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0,  in samsung_mipi_dphy_lane_enable()
1012 		regmap_write(samsung->regmap, COMBO_MD2_GNR_CON1,  in samsung_mipi_dphy_lane_enable()
1014 		regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0,  in samsung_mipi_dphy_lane_enable()
1018 		regmap_write(samsung->regmap, COMBO_MD1_GNR_CON1,  in samsung_mipi_dphy_lane_enable()
1020 		regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0,  in samsung_mipi_dphy_lane_enable()
1025 		regmap_write(samsung->regmap, COMBO_MD0_GNR_CON1,  in samsung_mipi_dphy_lane_enable()
1027 		regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0,  in samsung_mipi_dphy_lane_enable()
1035 	switch (samsung->lanes) {  in samsung_mipi_dphy_lane_disable()
1037 		regmap_update_bits(samsung->regmap, DPHY_MD3_GNR_CON0,  in samsung_mipi_dphy_lane_disable()
1041 		regmap_update_bits(samsung->regmap, COMBO_MD2_GNR_CON0,  in samsung_mipi_dphy_lane_disable()
1045 		regmap_update_bits(samsung->regmap, COMBO_MD1_GNR_CON0,  in samsung_mipi_dphy_lane_disable()
1050 		regmap_update_bits(samsung->regmap, COMBO_MD0_GNR_CON0,  in samsung_mipi_dphy_lane_disable()
1055 	regmap_update_bits(samsung->regmap, DPHY_MC_GNR_CON0, PHY_ENABLE, 0);  in samsung_mipi_dphy_lane_disable()
1060 	regmap_update_bits(samsung->regmap, PLL_CON0, S_MASK | P_MASK,  in samsung_mipi_dcphy_pll_configure()
1061 			   S(samsung->pll.scaler) | P(samsung->pll.prediv));  in samsung_mipi_dcphy_pll_configure()
1063 	if (samsung->pll.dsm < 0) {  in samsung_mipi_dcphy_pll_configure()
1067 		dsm_tmp = abs(samsung->pll.dsm);  in samsung_mipi_dcphy_pll_configure()
1068 		dsm_tmp = dsm_tmp - 1;  in samsung_mipi_dcphy_pll_configure()
1070 		regmap_write(samsung->regmap, PLL_CON1, dsm_tmp);  in samsung_mipi_dcphy_pll_configure()
1072 		regmap_write(samsung->regmap, PLL_CON1, samsung->pll.dsm);  in samsung_mipi_dcphy_pll_configure()
1075 	regmap_update_bits(samsung->regmap, PLL_CON2,  in samsung_mipi_dcphy_pll_configure()
1076 			   M_MASK, M(samsung->pll.fbdiv));  in samsung_mipi_dcphy_pll_configure()
1078 	if (samsung->pll.ssc_en) {  in samsung_mipi_dcphy_pll_configure()
1079 		regmap_write(samsung->regmap, PLL_CON3,  in samsung_mipi_dcphy_pll_configure()
1080 			     MRR(samsung->pll.mrr) | MFR(samsung->pll.mfr));  in samsung_mipi_dcphy_pll_configure()
1081 		regmap_update_bits(samsung->regmap, PLL_CON4, SSCG_EN, SSCG_EN);  in samsung_mipi_dcphy_pll_configure()
1084 	regmap_write(samsung->regmap, PLL_CON5, RESET_N_SEL | PLL_ENABLE_SEL);  in samsung_mipi_dcphy_pll_configure()
1085 	regmap_write(samsung->regmap, PLL_CON7, PLL_LOCK_CNT(0xf000));  in samsung_mipi_dcphy_pll_configure()
1086 	regmap_write(samsung->regmap, PLL_CON8, PLL_STB_CNT(0xf000));  in samsung_mipi_dcphy_pll_configure()
1094 	regmap_update_bits(samsung->regmap, PLL_CON0, PLL_EN, PLL_EN);  in samsung_mipi_dcphy_pll_enable()
1096 	ret = regmap_read_poll_timeout(samsung->regmap, PLL_STAT0,  in samsung_mipi_dcphy_pll_enable()
1099 		dev_err(samsung->dev, "DC-PHY pll failed to lock\n");  in samsung_mipi_dcphy_pll_enable()
1106 	regmap_update_bits(samsung->regmap, PLL_CON0, PLL_EN, 0);  in samsung_mipi_dcphy_pll_disable()
1114 	unsigned int lane_mbps = div64_ul(samsung->pll.rate, USEC_PER_SEC);  in samsung_mipi_dphy_get_timing()
1120 	for (i = num_timings; i > 1; i--)  in samsung_mipi_dphy_get_timing()
1121 		if (lane_mbps <= timings[i - 1].max_lane_mbps)  in samsung_mipi_dphy_get_timing()
1124 	return &timings[i - 1];  in samsung_mipi_dphy_get_timing()
1132 	u32 max_fout = samsung->pdata->dphy_tx_max_lane_kbps;  in samsung_mipi_dcphy_pll_round_rate()
1143 		dev_err(samsung->dev, "parent rate of PLL can not be zero\n");  in samsung_mipi_dcphy_pll_round_rate()
1178 				 /* 64 ≤ M[9:0] ≤ 1023 */  in samsung_mipi_dcphy_pll_round_rate()
1182 				/* -32767 ≤ K[15:0] ≤ 32767 */  in samsung_mipi_dcphy_pll_round_rate()
1183 				_dsm = ((_prediv * fvco) - (2 * _fbdiv * fin));  in samsung_mipi_dcphy_pll_round_rate()
1191 				delta = abs(fvco * MSEC_PER_SEC - tmp);  in samsung_mipi_dcphy_pll_round_rate()
1210 	dev_dbg(samsung->dev, "p: %d, m: %d, dsm:%ld, scaler: %d\n",  in samsung_mipi_dcphy_pll_round_rate()
1220 	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);  in samsung_mipi_dphy_clk_lane_timing_init()
1224 	regmap_write(samsung->regmap, DPHY_MC_GNR_CON0, 0xf000);  in samsung_mipi_dphy_clk_lane_timing_init()
1227 	 * The Drive-Strength / Voltage-Amplitude is adjusted by setting  in samsung_mipi_dphy_clk_lane_timing_init()
1228 	 * the Driver-Up Resistor and Driver-Down Resistor.  in samsung_mipi_dphy_clk_lane_timing_init()
1230 	res_up = samsung->pdata->dphy_hs_drv_res_cfg->clk_hs_drv_up_ohm;  in samsung_mipi_dphy_clk_lane_timing_init()
1231 	res_down = samsung->pdata->dphy_hs_drv_res_cfg->clk_hs_drv_down_ohm;  in samsung_mipi_dphy_clk_lane_timing_init()
1234 	regmap_write(samsung->regmap, DPHY_MC_ANA_CON0, val);  in samsung_mipi_dphy_clk_lane_timing_init()
1237 		regmap_write(samsung->regmap, DPHY_MC_ANA_CON1, 0x0001);  in samsung_mipi_dphy_clk_lane_timing_init()
1241 	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under  in samsung_mipi_dphy_clk_lane_timing_init()
1242 	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock  in samsung_mipi_dphy_clk_lane_timing_init()
1247 	val |= T_LPX(timing->lpx);  in samsung_mipi_dphy_clk_lane_timing_init()
1249 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON0, val);  in samsung_mipi_dphy_clk_lane_timing_init()
1251 	val = T_CLK_ZERO(timing->clk_zero) | T_CLK_PREPARE(timing->clk_prepare);  in samsung_mipi_dphy_clk_lane_timing_init()
1252 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON1, val);  in samsung_mipi_dphy_clk_lane_timing_init()
1254 	val = T_HS_EXIT(timing->hs_exit) | T_CLK_TRAIL(timing->clk_trail_eot);  in samsung_mipi_dphy_clk_lane_timing_init()
1255 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON2, val);  in samsung_mipi_dphy_clk_lane_timing_init()
1257 	val = T_CLK_POST(timing->clk_post);  in samsung_mipi_dphy_clk_lane_timing_init()
1258 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON3, val);  in samsung_mipi_dphy_clk_lane_timing_init()
1261 	regmap_write(samsung->regmap, DPHY_MC_TIME_CON4, 0x1f4);  in samsung_mipi_dphy_clk_lane_timing_init()
1268 		regmap_write(samsung->regmap, DPHY_MC_DESKEW_CON0, 0x9cb1);  in samsung_mipi_dphy_clk_lane_timing_init()
1275 	unsigned int lane_hs_rate = div64_ul(samsung->pll.rate, USEC_PER_SEC);  in samsung_mipi_dphy_data_lane_timing_init()
1281 	 * The Drive-Strength / Voltage-Amplitude is adjusted by adjusting the  in samsung_mipi_dphy_data_lane_timing_init()
1282 	 *  Driver-Up Resistor and Driver-Down Resistor.  in samsung_mipi_dphy_data_lane_timing_init()
1284 	res_up = samsung->pdata->dphy_hs_drv_res_cfg->data_hs_drv_up_ohm;  in samsung_mipi_dphy_data_lane_timing_init()
1285 	res_down = samsung->pdata->dphy_hs_drv_res_cfg->data_hs_drv_down_ohm;  in samsung_mipi_dphy_data_lane_timing_init()
1288 	regmap_write(samsung->regmap, COMBO_MD0_ANA_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1289 	regmap_write(samsung->regmap, COMBO_MD1_ANA_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1290 	regmap_write(samsung->regmap, COMBO_MD2_ANA_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1291 	regmap_write(samsung->regmap, DPHY_MD3_ANA_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1294 		regmap_write(samsung->regmap, COMBO_MD0_ANA_CON1, 0x0001);  in samsung_mipi_dphy_data_lane_timing_init()
1295 		regmap_write(samsung->regmap, COMBO_MD1_ANA_CON1, 0x0001);  in samsung_mipi_dphy_data_lane_timing_init()
1296 		regmap_write(samsung->regmap, COMBO_MD2_ANA_CON1, 0x0001);  in samsung_mipi_dphy_data_lane_timing_init()
1297 		regmap_write(samsung->regmap, DPHY_MD3_ANA_CON1, 0x0001);  in samsung_mipi_dphy_data_lane_timing_init()
1302 	 * Divide-by-2 Clock from Serial Clock. Use this when data rate is under  in samsung_mipi_dphy_data_lane_timing_init()
1303 	 * 1500Mbps, otherwise divide-by-16 Clock from Serial Clock  in samsung_mipi_dphy_data_lane_timing_init()
1308 	val |= T_LPX(timing->lpx);  in samsung_mipi_dphy_data_lane_timing_init()
1310 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1311 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1312 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1313 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON0, val);  in samsung_mipi_dphy_data_lane_timing_init()
1315 	val = T_HS_ZERO(timing->hs_zero) | T_HS_PREPARE(timing->hs_prepare);  in samsung_mipi_dphy_data_lane_timing_init()
1316 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON1, val);  in samsung_mipi_dphy_data_lane_timing_init()
1317 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON1, val);  in samsung_mipi_dphy_data_lane_timing_init()
1318 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON1, val);  in samsung_mipi_dphy_data_lane_timing_init()
1319 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON1, val);  in samsung_mipi_dphy_data_lane_timing_init()
1321 	val = T_HS_EXIT(timing->hs_exit) | T_HS_TRAIL(timing->hs_trail_eot);  in samsung_mipi_dphy_data_lane_timing_init()
1322 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON2, val);  in samsung_mipi_dphy_data_lane_timing_init()
1323 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON2, val);  in samsung_mipi_dphy_data_lane_timing_init()
1324 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON2, val);  in samsung_mipi_dphy_data_lane_timing_init()
1325 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON2, val);  in samsung_mipi_dphy_data_lane_timing_init()
1327 	/* TTA-GET/TTA-GO Timing Counter register use default value */  in samsung_mipi_dphy_data_lane_timing_init()
1329 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON3, val);  in samsung_mipi_dphy_data_lane_timing_init()
1330 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON3, val);  in samsung_mipi_dphy_data_lane_timing_init()
1331 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON3, val);  in samsung_mipi_dphy_data_lane_timing_init()
1332 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON3, val);  in samsung_mipi_dphy_data_lane_timing_init()
1335 	regmap_write(samsung->regmap, COMBO_MD0_TIME_CON4, 0x1f4);  in samsung_mipi_dphy_data_lane_timing_init()
1336 	regmap_write(samsung->regmap, COMBO_MD1_TIME_CON4, 0x1f4);  in samsung_mipi_dphy_data_lane_timing_init()
1337 	regmap_write(samsung->regmap, COMBO_MD2_TIME_CON4, 0x1f4);  in samsung_mipi_dphy_data_lane_timing_init()
1338 	regmap_write(samsung->regmap, DPHY_MD3_TIME_CON4, 0x1f4);  in samsung_mipi_dphy_data_lane_timing_init()
1345 	reset_control_assert(samsung->m_phy_rst);  in samsung_mipi_dphy_power_on()
1357 	reset_control_deassert(samsung->m_phy_rst);  in samsung_mipi_dphy_power_on()
1371 	reset_control_assert(samsung->apb_rst);  in samsung_mipi_dcphy_power_on()
1373 	reset_control_deassert(samsung->apb_rst);  in samsung_mipi_dcphy_power_on()
1375 	switch (samsung->type) {  in samsung_mipi_dcphy_power_on()
1380 		return -EOPNOTSUPP;  in samsung_mipi_dcphy_power_on()
1390 	switch (samsung->type) {  in samsung_mipi_dcphy_power_off()
1396 		return -EOPNOTSUPP;  in samsung_mipi_dcphy_power_off()
1408 	unsigned long fin = div64_ul(clk_get_rate(samsung->ref_clk), MSEC_PER_SEC);  in samsung_mipi_dcphy_pll_ssc_modulation_calc()
1409 	u16 prediv = samsung->pll.prediv;  in samsung_mipi_dcphy_pll_ssc_modulation_calc()
1410 	u16 fbdiv = samsung->pll.fbdiv;  in samsung_mipi_dcphy_pll_ssc_modulation_calc()
1442 		dev_err(samsung->dev, "failed to calc ssc parameter mfr and mrr\n");  in samsung_mipi_dcphy_pll_ssc_modulation_calc()
1443 		return -EINVAL;  in samsung_mipi_dcphy_pll_ssc_modulation_calc()
1453 	unsigned long prate = clk_get_rate(samsung->ref_clk);  in samsung_mipi_dcphy_pll_calc_rate()
1465 	dev_dbg(samsung->dev, "%s: fin=%lu, req_rate=%llu\n",  in samsung_mipi_dcphy_pll_calc_rate()
1467 	dev_dbg(samsung->dev, "%s: fout=%lu, prediv=%u, fbdiv=%u\n",  in samsung_mipi_dcphy_pll_calc_rate()
1470 	samsung->pll.prediv = prediv;  in samsung_mipi_dcphy_pll_calc_rate()
1471 	samsung->pll.fbdiv = fbdiv;  in samsung_mipi_dcphy_pll_calc_rate()
1472 	samsung->pll.dsm = dsm;  in samsung_mipi_dcphy_pll_calc_rate()
1473 	samsung->pll.scaler = scaler;  in samsung_mipi_dcphy_pll_calc_rate()
1474 	samsung->pll.rate = fout;  in samsung_mipi_dcphy_pll_calc_rate()
1484 			samsung->pll.ssc_en = true;  in samsung_mipi_dcphy_pll_calc_rate()
1485 			samsung->pll.mfr = mfr;  in samsung_mipi_dcphy_pll_calc_rate()
1486 			samsung->pll.mrr = mrr;  in samsung_mipi_dcphy_pll_calc_rate()
1495 	unsigned long long target_rate = opts->mipi_dphy.hs_clk_rate;  in samsung_mipi_dcphy_configure()
1497 	samsung->lanes = opts->mipi_dphy.lanes > 4 ? 4 : opts->mipi_dphy.lanes;  in samsung_mipi_dcphy_configure()
1500 	opts->mipi_dphy.hs_clk_rate = samsung->pll.rate;  in samsung_mipi_dcphy_configure()
1509 	return pm_runtime_resume_and_get(samsung->dev);  in samsung_mipi_dcphy_init()
1516 	return pm_runtime_put(samsung->dev);  in samsung_mipi_dcphy_exit()
1541 	if (args->args_count != 1) {  in samsung_mipi_dcphy_xlate()
1543 		return ERR_PTR(-EINVAL);  in samsung_mipi_dcphy_xlate()
1546 	if (samsung->type != PHY_NONE && samsung->type != args->args[0])  in samsung_mipi_dcphy_xlate()
1548 			 args->args[0], samsung->type);  in samsung_mipi_dcphy_xlate()
1550 	samsung->type = args->args[0];  in samsung_mipi_dcphy_xlate()
1552 	return samsung->phy;  in samsung_mipi_dcphy_xlate()
1557 	struct device *dev = &pdev->dev;  in samsung_mipi_dcphy_probe()
1558 	struct device_node *np = dev->of_node;  in samsung_mipi_dcphy_probe()
1567 		return -ENOMEM;  in samsung_mipi_dcphy_probe()
1569 	samsung->dev = dev;  in samsung_mipi_dcphy_probe()
1570 	samsung->pdata = device_get_match_data(dev);  in samsung_mipi_dcphy_probe()
1578 	samsung->regmap = devm_regmap_init_mmio(dev, regs,  in samsung_mipi_dcphy_probe()
1580 	if (IS_ERR(samsung->regmap))  in samsung_mipi_dcphy_probe()
1581 		return dev_err_probe(dev, PTR_ERR(samsung->regmap), "Failed to init regmap\n");  in samsung_mipi_dcphy_probe()
1583 	samsung->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");  in samsung_mipi_dcphy_probe()
1584 	if (IS_ERR(samsung->grf_regmap))  in samsung_mipi_dcphy_probe()
1585 		return dev_err_probe(dev, PTR_ERR(samsung->grf_regmap),  in samsung_mipi_dcphy_probe()
1588 	samsung->ref_clk = devm_clk_get(dev, "ref");  in samsung_mipi_dcphy_probe()
1589 	if (IS_ERR(samsung->ref_clk))  in samsung_mipi_dcphy_probe()
1590 		return dev_err_probe(dev, PTR_ERR(samsung->ref_clk),  in samsung_mipi_dcphy_probe()
1593 	samsung->pclk = devm_clk_get(dev, "pclk");  in samsung_mipi_dcphy_probe()
1594 	if (IS_ERR(samsung->pclk))  in samsung_mipi_dcphy_probe()
1595 		return dev_err_probe(dev, PTR_ERR(samsung->pclk), "Failed to get pclk\n");  in samsung_mipi_dcphy_probe()
1597 	samsung->m_phy_rst = devm_reset_control_get(dev, "m_phy");  in samsung_mipi_dcphy_probe()
1598 	if (IS_ERR(samsung->m_phy_rst))  in samsung_mipi_dcphy_probe()
1599 		return dev_err_probe(dev, PTR_ERR(samsung->m_phy_rst),  in samsung_mipi_dcphy_probe()
1602 	samsung->s_phy_rst = devm_reset_control_get(dev, "s_phy");  in samsung_mipi_dcphy_probe()
1603 	if (IS_ERR(samsung->s_phy_rst))  in samsung_mipi_dcphy_probe()
1604 		return dev_err_probe(dev, PTR_ERR(samsung->s_phy_rst),  in samsung_mipi_dcphy_probe()
1607 	samsung->apb_rst = devm_reset_control_get(dev, "apb");  in samsung_mipi_dcphy_probe()
1608 	if (IS_ERR(samsung->apb_rst))  in samsung_mipi_dcphy_probe()
1609 		return dev_err_probe(dev, PTR_ERR(samsung->apb_rst),  in samsung_mipi_dcphy_probe()
1612 	samsung->grf_apb_rst = devm_reset_control_get(dev, "grf");  in samsung_mipi_dcphy_probe()
1613 	if (IS_ERR(samsung->grf_apb_rst))  in samsung_mipi_dcphy_probe()
1614 		return dev_err_probe(dev, PTR_ERR(samsung->grf_apb_rst),  in samsung_mipi_dcphy_probe()
1617 	samsung->phy = devm_phy_create(dev, NULL, &samsung_mipi_dcphy_ops);  in samsung_mipi_dcphy_probe()
1618 	if (IS_ERR(samsung->phy))  in samsung_mipi_dcphy_probe()
1619 		return dev_err_probe(dev, PTR_ERR(samsung->phy), "Failed to create MIPI DC-PHY\n");  in samsung_mipi_dcphy_probe()
1621 	phy_set_drvdata(samsung->phy, samsung);  in samsung_mipi_dcphy_probe()
1639 	clk_disable_unprepare(samsung->ref_clk);  in samsung_mipi_dcphy_runtime_suspend()
1640 	clk_disable_unprepare(samsung->pclk);  in samsung_mipi_dcphy_runtime_suspend()
1650 	ret = clk_prepare_enable(samsung->pclk);  in samsung_mipi_dcphy_runtime_resume()
1652 		dev_err(samsung->dev, "Failed to enable pclk, %d\n", ret);  in samsung_mipi_dcphy_runtime_resume()
1656 	ret = clk_prepare_enable(samsung->ref_clk);  in samsung_mipi_dcphy_runtime_resume()
1658 		dev_err(samsung->dev, "Failed to enable reference clock, %d\n", ret);  in samsung_mipi_dcphy_runtime_resume()
1659 		clk_disable_unprepare(samsung->pclk);  in samsung_mipi_dcphy_runtime_resume()
1697 		.compatible = "rockchip,rk3576-mipi-dcphy",
1700 		.compatible = "rockchip,rk3588-mipi-dcphy",
1709 		.name = "samsung-mipi-dcphy",
1717 MODULE_AUTHOR("Guochun Huang <hero.huang@rock-chips.com>");