Kconfig - OpenGrok cross reference for /linux-6.15/drivers/phy/qualcomm/Kconfig

1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Qualcomm and Atheros platforms
6 	tristate "Atheros AR71XX/9XXX USB PHY driver"
12 	  Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
15 	tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
22 	tristate "Qualcomm eDP PHY driver"
28 	  Enable this driver to support the Qualcomm eDP PHY found in various
32 	tristate "Qualcomm IPQ4019 USB PHY driver"
36 	  Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
39 	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
46 	tristate "Qualcomm PCIe Gen2 PHY Driver"
50 	  Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
54 	tristate "Qualcomm QMP PHY Drivers"
60 	tristate "Qualcomm QMP Combo PHY Driver"
68 	  Enable this to support the QMP Combo PHY transceiver that is used
72 	tristate "Qualcomm QMP PCIe PHY Driver"
77 	  Enable this to support the QMP PCIe PHY transceiver that is used
81 	tristate "Qualcomm QMP PCIe 8996 PHY Driver"
86 	  Enable this to support the QMP PCIe PHY transceiver that is used
90 	tristate "Qualcomm QMP UFS PHY Driver"
94 	  Enable this to support the QMP UFS PHY transceiver that is used
98 	tristate "Qualcomm QMP USB PHY Driver"
102 	  Enable this to support the QMP USB PHY transceiver that is used
106 	tristate "Qualcomm QMP legacy USB PHY Driver"
111 	  PHY transceivers working only in USB3 mode on Qualcomm chips. This
118 	tristate "Qualcomm QUSB2 PHY Driver"
123 	  Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
124 	  controllers on Qualcomm chips. This driver supports the high-speed
125 	  PHY which is usually paired with either the ChipIdea or Synopsys DWC3
129 	tristate "Qualcomm SNPS eUSB2 PHY Driver"
133 	  Enable support for the USB high-speed SNPS eUSB2 phy on Qualcomm
134 	  chipsets. The PHY is paired with a Synopsys DWC3 USB controller
142 	  Enable support for the USB high-speed SNPS eUSB2 repeater on Qualcomm
143 	  PMICs. The repeater is paired with a Synopsys eUSB2 Phy
147 	tristate "Qualcomm M31 HS PHY driver support"
151 	  Enable this to support M31 HS PHY transceivers on Qualcomm chips
152 	  with DWC3 USB core. It handles PHY initialization, clock
158 	bool "PCIE UNIPHY 28LP PHY driver"
165 	  Enable this to support the PCIe UNIPHY 28LP phy transceiver that
167 	  handles PHY initialization, clock management required after
171 	tristate "Qualcomm USB HS PHY module"
173 	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
176 	  Support for the USB high-speed ULPI compliant phy on Qualcomm
180 	tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
184 	  Enable support for the USB high-speed SNPS Femto phy on Qualcomm
185 	  chipsets.  This PHY has differences in the register map compared
186 	  to the V1 variants.  The PHY is paired with a Synopsys DWC3 USB
190 	tristate "Qualcomm USB HSIC ULPI PHY module"
194 	  Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
197 	tristate "Qualcomm 28nm High-Speed PHY"
199 	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
203 	  High-Speed PHY driver. This driver supports the Hi-Speed PHY which
208 	tristate "Qualcomm USB Super-Speed PHY driver"
210 	depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
213 	  Enable this to support the Super-Speed USB transceiver on various
217 	tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
224 	  both HS and SS PHY controllers.
227 	tristate "Qualcomm DWMAC SGMII SerDes/PHY driver"
232 	  Enable this to support the internal SerDes/SGMII PHY on various