Lines Matching +full:non +full:- +full:prefetchable
1 // SPDX-License-Identifier: GPL-2.0
35 /* Per SR-IOV spec 3.4.1.11, VF BARs are RO zero */ in pci_std_update_resource()
36 if (dev->is_virtfn) in pci_std_update_resource()
43 if (!res->flags) in pci_std_update_resource()
46 if (res->flags & IORESOURCE_UNSET) in pci_std_update_resource()
50 * Ignore non-moveable resources. This might be legacy resources for in pci_std_update_resource()
54 if (res->flags & IORESOURCE_PCI_FIXED) in pci_std_update_resource()
57 pcibios_resource_to_bus(dev->bus, ®ion, res); in pci_std_update_resource()
60 if (res->flags & IORESOURCE_IO) { in pci_std_update_resource()
62 new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK; in pci_std_update_resource()
67 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; in pci_std_update_resource()
82 if (!(res->flags & IORESOURCE_ROM_ENABLE) && in pci_std_update_resource()
83 !dev->rom_bar_overlap) in pci_std_update_resource()
86 reg = dev->rom_base_reg; in pci_std_update_resource()
87 if (res->flags & IORESOURCE_ROM_ENABLE) in pci_std_update_resource()
93 * We can't update a 64-bit BAR atomically, so when possible, in pci_std_update_resource()
94 * disable decoding so that a half-updated BAR won't conflict in pci_std_update_resource()
97 disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on; in pci_std_update_resource()
112 if (res->flags & IORESOURCE_MEM_64) { in pci_std_update_resource()
136 struct resource *res = &dev->resource[resource]; in pci_claim_resource()
140 if (res->flags & IORESOURCE_UNSET) { in pci_claim_resource()
143 return -EINVAL; in pci_claim_resource()
151 if (res->flags & IORESOURCE_ROM_SHADOW) in pci_claim_resource()
158 res->flags |= IORESOURCE_UNSET; in pci_claim_resource()
159 return -EINVAL; in pci_claim_resource()
165 res_name, res, conflict->name, conflict); in pci_claim_resource()
166 res->flags |= IORESOURCE_UNSET; in pci_claim_resource()
167 return -EBUSY; in pci_claim_resource()
179 /* Prefetchable MMIO Base/Limit */ in pci_disable_bridge_window()
190 * Can be over-ridden by architecture specific code that implements
208 return -ENOMEM; in pci_revert_fw_address()
210 start = res->start; in pci_revert_fw_address()
211 end = res->end; in pci_revert_fw_address()
213 res->flags &= ~IORESOURCE_UNSET; in pci_revert_fw_address()
222 return -ENXIO; in pci_revert_fw_address()
228 if (res->flags & IORESOURCE_IO) in pci_revert_fw_address()
238 conflict->name, conflict); in pci_revert_fw_address()
239 res->start = start; in pci_revert_fw_address()
240 res->end = end; in pci_revert_fw_address()
241 res->flags |= IORESOURCE_UNSET; in pci_revert_fw_address()
242 return -EBUSY; in pci_revert_fw_address()
257 return res->start; in pcibios_align_resource()
267 min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM; in __pci_assign_resource()
270 * First, try exact prefetching match. Even if a 64-bit in __pci_assign_resource()
271 * prefetchable bridge window is below 4GB, we can't put a 32-bit in __pci_assign_resource()
272 * prefetchable resource in it because pbus_size_mem() assumes a in __pci_assign_resource()
273 * 64-bit window will contain no 32-bit resources. If we assign in __pci_assign_resource()
283 * If the prefetchable window is only 32 bits wide, we can put in __pci_assign_resource()
284 * 64-bit prefetchable resources in it. in __pci_assign_resource()
286 if ((res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) == in __pci_assign_resource()
297 * in a non-prefetchable window. If this resource is 32 bits and in __pci_assign_resource()
298 * non-prefetchable, the first call already tried the only possibility in __pci_assign_resource()
301 if (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) in __pci_assign_resource()
314 bus = dev->bus; in _pci_assign_resource()
316 if (!bus->parent || !bus->self->transparent) in _pci_assign_resource()
318 bus = bus->parent; in _pci_assign_resource()
331 if (res->flags & IORESOURCE_PCI_FIXED) in pci_assign_resource()
334 res->flags |= IORESOURCE_UNSET; in pci_assign_resource()
339 return -EINVAL; in pci_assign_resource()
360 res->flags &= ~IORESOURCE_UNSET; in pci_assign_resource()
361 res->flags &= ~IORESOURCE_STARTALIGN; in pci_assign_resource()
379 if (res->flags & IORESOURCE_PCI_FIXED) in pci_reassign_resource()
382 flags = res->flags; in pci_reassign_resource()
383 res->flags |= IORESOURCE_UNSET; in pci_reassign_resource()
384 if (!res->parent) { in pci_reassign_resource()
387 return -EINVAL; in pci_reassign_resource()
393 res->flags = flags; in pci_reassign_resource()
399 res->flags &= ~IORESOURCE_UNSET; in pci_reassign_resource()
400 res->flags &= ~IORESOURCE_STARTALIGN; in pci_reassign_resource()
414 if (!res->parent) in pci_release_resource()
420 res->end = resource_size(res) - 1; in pci_release_resource()
421 res->start = 0; in pci_release_resource()
422 res->flags |= IORESOURCE_UNSET; in pci_release_resource()
435 host = pci_find_host_bridge(dev->bus); in pci_resize_resource()
436 if (host->preserve_config) in pci_resize_resource()
437 return -ENOTSUPP; in pci_resize_resource()
440 if (!(res->flags & IORESOURCE_UNSET)) in pci_resize_resource()
441 return -EBUSY; in pci_resize_resource()
445 return -EBUSY; in pci_resize_resource()
449 return -ENOTSUPP; in pci_resize_resource()
452 return -EINVAL; in pci_resize_resource()
465 if (dev->bus->self) { in pci_resize_resource()
466 ret = pci_reassign_bridge_resources(dev->bus->self, res->flags); in pci_resize_resource()
495 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) in pci_enable_resources()
500 if (r->flags & IORESOURCE_UNSET) { in pci_enable_resources()
503 return -EINVAL; in pci_enable_resources()
506 if (!r->parent) { in pci_enable_resources()
509 return -EINVAL; in pci_enable_resources()
512 if (r->flags & IORESOURCE_IO) in pci_enable_resources()
514 if (r->flags & IORESOURCE_MEM) in pci_enable_resources()
519 pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd); in pci_enable_resources()