Lines Matching +full:non +full:- +full:prefetchable
1 // SPDX-License-Identifier: GPL-2.0
11 * PCI-PCI bridges cleanup, sorted resource allocation.
14 * tighter packing. Prefetchable range support.
50 list_del(&dev_res->list); in free_list()
56 * add_to_list() - Add a new resource tracker to the list
71 return -ENOMEM; in add_to_list()
73 tmp->res = res; in add_to_list()
74 tmp->dev = dev; in add_to_list()
75 tmp->start = res->start; in add_to_list()
76 tmp->end = res->end; in add_to_list()
77 tmp->flags = res->flags; in add_to_list()
78 tmp->add_size = add_size; in add_to_list()
79 tmp->min_align = min_align; in add_to_list()
81 list_add(&tmp->list, head); in add_to_list()
91 if (dev_res->res == res) { in remove_from_list()
92 list_del(&dev_res->list); in remove_from_list()
105 if (dev_res->res == res) in res_to_dev_res()
118 return dev_res ? dev_res->add_size : 0; in get_res_add_size()
127 return dev_res ? dev_res->min_align : 0; in get_res_add_align()
132 struct resource *res = dev_res->res; in restore_dev_resource()
134 res->start = dev_res->start; in restore_dev_resource()
135 res->end = dev_res->end; in restore_dev_resource()
136 res->flags = dev_res->flags; in restore_dev_resource()
141 u16 class = dev->class >> 8, command; in pdev_resources_assignable()
172 if (r->flags & IORESOURCE_PCI_FIXED) in pdev_sort_resources()
175 if (!(r->flags) || r->parent) in pdev_sort_resources()
188 tmp->res = r; in pdev_sort_resources()
189 tmp->dev = dev; in pdev_sort_resources()
190 tmp->start = r->start; in pdev_sort_resources()
191 tmp->end = r->end; in pdev_sort_resources()
192 tmp->flags = r->flags; in pdev_sort_resources()
199 align = pci_resource_alignment(dev_res->dev, in pdev_sort_resources()
200 dev_res->res); in pdev_sort_resources()
203 n = &dev_res->list; in pdev_sort_resources()
208 list_add_tail(&tmp->list, n); in pdev_sort_resources()
218 if (resno == PCI_ROM_RESOURCE && !(res->flags & IORESOURCE_ROM_ENABLE)) in pci_resource_is_optional()
226 res->start = 0; in reset_resource()
227 res->end = 0; in reset_resource()
228 res->flags = 0; in reset_resource()
232 * reassign_resources_sorted() - Satisfy any additional resource requests
256 res = add_res->res; in reassign_resources_sorted()
257 dev = add_res->dev; in reassign_resources_sorted()
264 if (!res->parent && resource_size(res) && in reassign_resources_sorted()
270 if (dev_res->res == res) { in reassign_resources_sorted()
279 add_size = add_res->add_size; in reassign_resources_sorted()
280 align = add_res->min_align; in reassign_resources_sorted()
281 if (!res->parent) { in reassign_resources_sorted()
290 res->flags |= add_res->flags & in reassign_resources_sorted()
298 list_del(&add_res->list); in reassign_resources_sorted()
304 * assign_requested_resources_sorted() - Satisfy resource requests
325 res = dev_res->res; in assign_requested_resources_sorted()
326 dev = dev_res->dev; in assign_requested_resources_sorted()
353 mask |= fail_res->flags; in pci_fail_res_type_mask()
357 * allocate pref in non-pref range. Will release all assigned in pci_fail_res_type_mask()
358 * non-pref sibling resources according to that bit. in pci_fail_res_type_mask()
365 if (res->flags & IORESOURCE_IO) in pci_need_to_release()
369 if (res->flags & IORESOURCE_PREFETCH) { in pci_need_to_release()
372 /* Count pref if its parent is non-pref */ in pci_need_to_release()
374 !(res->parent->flags & IORESOURCE_PREFETCH)) in pci_need_to_release()
380 if (res->flags & IORESOURCE_MEM) in pci_need_to_release()
392 int idx = pci_resource_num(fail_res->dev, fail_res->res); in pci_required_resource_failed()
394 if (!pci_resource_is_optional(fail_res->dev, idx)) in pci_required_resource_failed()
421 * MMIO. If assigned pref MMIO's parent is non-pref MMIO in __assign_resources_sorted()
422 * and non-pref MMIO assignment fails, will release that in __assign_resources_sorted()
424 * 3. If non-pref MMIO assignment fails or pref MMIO in __assign_resources_sorted()
425 * assignment fails, will release assigned non-pref MMIO. in __assign_resources_sorted()
448 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) { in __assign_resources_sorted()
456 res = dev_res->res; in __assign_resources_sorted()
458 res->end += get_res_add_size(realloc_head, res); in __assign_resources_sorted()
462 * 1. bridge resource -- IORESOURCE_STARTALIGN in __assign_resources_sorted()
463 * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN in __assign_resources_sorted()
466 if (!(res->flags & IORESOURCE_STARTALIGN)) in __assign_resources_sorted()
478 if (add_align > res->start) { in __assign_resources_sorted()
482 align = pci_resource_alignment(dev_res2->dev, in __assign_resources_sorted()
483 dev_res2->res); in __assign_resources_sorted()
485 list_move_tail(&dev_res->list, in __assign_resources_sorted()
486 &dev_res2->list); in __assign_resources_sorted()
497 /* All non-optional resources assigned? */ in __assign_resources_sorted()
501 remove_from_list(realloc_head, dev_res->res); in __assign_resources_sorted()
510 struct resource *res = save_res->res; in __assign_resources_sorted()
512 if (res->parent) in __assign_resources_sorted()
526 res = dev_res->res; in __assign_resources_sorted()
528 if (res->parent && !pci_need_to_release(fail_type, res)) { in __assign_resources_sorted()
532 list_del(&dev_res->list); in __assign_resources_sorted()
540 res = dev_res->res; in __assign_resources_sorted()
541 dev = dev_res->dev; in __assign_resources_sorted()
543 if (!res->parent) in __assign_resources_sorted()
558 /* Satisfy the must-have resource requests */ in __assign_resources_sorted()
568 res = dev_res->res; in __assign_resources_sorted()
569 dev = dev_res->dev; in __assign_resources_sorted()
571 if (res->parent) in __assign_resources_sorted()
604 list_for_each_entry(dev, &bus->devices, bus_list) in pbus_assign_resources_sorted()
612 struct pci_dev *bridge = bus->self; in pci_setup_cardbus()
617 &bus->busn_res); in pci_setup_cardbus()
619 res = bus->resource[0]; in pci_setup_cardbus()
620 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
621 if (res->flags & IORESOURCE_IO) { in pci_setup_cardbus()
633 res = bus->resource[1]; in pci_setup_cardbus()
634 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
635 if (res->flags & IORESOURCE_IO) { in pci_setup_cardbus()
643 res = bus->resource[2]; in pci_setup_cardbus()
644 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
645 if (res->flags & IORESOURCE_MEM) { in pci_setup_cardbus()
653 res = bus->resource[3]; in pci_setup_cardbus()
654 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
655 if (res->flags & IORESOURCE_MEM) { in pci_setup_cardbus()
666 * Initialize bridges with base/limit values we have collected. PCI-to-PCI
673 * bridges which support 32-bit I/O. This update requires two config space
676 * 64-bit prefetchable MMIO.
689 if (bridge->io_window_1k) in pci_setup_bridge_io()
693 res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_setup_bridge_io()
695 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_bridge_io()
696 if (res->flags & IORESOURCE_IO) { in pci_setup_bridge_io()
725 res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_setup_bridge_mmio()
727 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_bridge_mmio()
728 if (res->flags & IORESOURCE_MEM) { in pci_setup_bridge_mmio()
747 * PCI_PREF_BASE_UPPER32 was non-zero, this temporarily disables in pci_setup_bridge_mmio_pref()
754 res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_setup_bridge_mmio_pref()
756 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_bridge_mmio_pref()
757 if (res->flags & IORESOURCE_PREFETCH) { in pci_setup_bridge_mmio_pref()
760 if (res->flags & IORESOURCE_MEM_64) { in pci_setup_bridge_mmio_pref()
777 struct pci_dev *bridge = bus->self; in __pci_setup_bridge()
780 &bus->busn_res); in __pci_setup_bridge()
791 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); in __pci_setup_bridge()
816 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_claim_bridge_resource()
820 return -EINVAL; /* Clipping didn't change anything */ in pci_claim_bridge_resource()
833 return -EINVAL; in pci_claim_bridge_resource()
839 return -EINVAL; in pci_claim_bridge_resource()
843 * Check whether the bridge supports optional I/O and prefetchable memory
844 * ranges. If not, the respective base/limit registers must be read-only
849 struct pci_dev *bridge = bus->self; in pci_bridge_check_ranges()
852 b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_check_ranges()
853 b_res->flags |= IORESOURCE_MEM; in pci_bridge_check_ranges()
855 if (bridge->io_window) { in pci_bridge_check_ranges()
856 b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_check_ranges()
857 b_res->flags |= IORESOURCE_IO; in pci_bridge_check_ranges()
860 if (bridge->pref_window) { in pci_bridge_check_ranges()
861 b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_check_ranges()
862 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; in pci_bridge_check_ranges()
863 if (bridge->pref_64_window) { in pci_bridge_check_ranges()
864 b_res->flags |= IORESOURCE_MEM_64 | in pci_bridge_check_ranges()
871 * Helper function for sizing routines. Assigned resources have non-NULL
890 if (r && (r->flags & type_mask) == type && !r->parent) in find_bus_resource_of_type()
892 if (r && (r->flags & type_mask) == type && !r_assigned) in find_bus_resource_of_type()
957 * Per spec, I/O windows are 4K-aligned, but some bridges have in window_alignment()
960 if (bus->self && bus->self->io_window_1k) in window_alignment()
971 * pbus_size_io() - Size the I/O window of a given bus
978 * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
979 * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
998 if (b_res->parent) in pbus_size_io()
1002 list_for_each_entry(dev, &bus->devices, bus_list) { in pbus_size_io()
1008 if (r->parent || !(r->flags & IORESOURCE_IO)) in pbus_size_io()
1013 /* Might be re-aligned for ISA */ in pbus_size_io()
1038 if (bus->self && (b_res->start || b_res->end)) in pbus_size_io()
1039 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_io()
1040 b_res, &bus->busn_res); in pbus_size_io()
1041 b_res->flags = 0; in pbus_size_io()
1046 b_res->flags |= IORESOURCE_STARTALIGN; in pbus_size_io()
1047 if (bus->self && size1 > size0 && realloc_head) { in pbus_size_io()
1048 add_to_list(realloc_head, bus->self, b_res, size1-size0, in pbus_size_io()
1050 pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n", in pbus_size_io()
1051 b_res, &bus->busn_res, in pbus_size_io()
1052 (unsigned long long) size1 - size0); in pbus_size_io()
1079 * pbus_upstream_space_available - Check no upstream resource limits allocation
1103 while ((bus = bus->parent)) { in pbus_upstream_space_available()
1108 if (!r || !r->parent || (r->flags & mask) != type) in pbus_upstream_space_available()
1116 pci_dbg(bus->self, in pbus_upstream_space_available()
1118 r, &bus->busn_res, &gap); in pbus_upstream_space_available()
1123 if (bus->self) { in pbus_upstream_space_available()
1124 pci_info(bus->self, in pbus_upstream_space_available()
1126 r, &bus->busn_res, in pbus_upstream_space_available()
1128 pci_name(downstream->self), in pbus_upstream_space_available()
1129 &downstream->busn_res); in pbus_upstream_space_available()
1140 * pbus_size_mem() - Size the memory window of a given bus
1154 * Return -ENOSPC if there's no available bus resource of the desired
1175 return -ENOSPC; in pbus_size_mem()
1178 if (b_res->parent) in pbus_size_mem()
1185 list_for_each_entry(dev, &bus->devices, bus_list) { in pbus_size_mem()
1193 if (r->parent || (r->flags & IORESOURCE_PCI_FIXED) || in pbus_size_mem()
1194 ((r->flags & mask) != type && in pbus_size_mem()
1195 (r->flags & mask) != type2 && in pbus_size_mem()
1196 (r->flags & mask) != type3)) in pbus_size_mem()
1215 order = __ffs(align) - __ffs(SZ_1M); in pbus_size_mem()
1221 r->flags = 0; in pbus_size_mem()
1242 win_align = window_alignment(bus, b_res->flags); in pbus_size_mem()
1247 if (bus->self && size0 && in pbus_size_mem()
1253 pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n", in pbus_size_mem()
1254 b_res, &bus->busn_res); in pbus_size_mem()
1262 if (bus->self && size1 && in pbus_size_mem()
1269 pci_info(bus->self, in pbus_size_mem()
1271 b_res, &bus->busn_res); in pbus_size_mem()
1276 if (bus->self && (b_res->start || b_res->end)) in pbus_size_mem()
1277 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_mem()
1278 b_res, &bus->busn_res); in pbus_size_mem()
1279 b_res->flags = 0; in pbus_size_mem()
1284 b_res->flags |= IORESOURCE_STARTALIGN; in pbus_size_mem()
1285 if (bus->self && size1 > size0 && realloc_head) { in pbus_size_mem()
1286 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align); in pbus_size_mem()
1287 pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n", in pbus_size_mem()
1288 b_res, &bus->busn_res, in pbus_size_mem()
1289 (unsigned long long) (size1 - size0), in pbus_size_mem()
1297 if (res->flags & IORESOURCE_IO) in pci_cardbus_resource_alignment()
1299 if (res->flags & IORESOURCE_MEM) in pci_cardbus_resource_alignment()
1307 struct pci_dev *bridge = bus->self; in pci_bus_size_cardbus()
1312 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW]; in pci_bus_size_cardbus()
1313 if (b_res->parent) in pci_bus_size_cardbus()
1320 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1322 b_res->end -= pci_cardbus_io_size; in pci_bus_size_cardbus()
1328 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW]; in pci_bus_size_cardbus()
1329 if (b_res->parent) in pci_bus_size_cardbus()
1332 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1334 b_res->end -= pci_cardbus_io_size; in pci_bus_size_cardbus()
1348 /* Check whether prefetchable memory is supported by this bridge. */ in pci_bus_size_cardbus()
1356 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW]; in pci_bus_size_cardbus()
1357 if (b_res->parent) in pci_bus_size_cardbus()
1360 * If we have prefetchable memory support, allocate two regions. in pci_bus_size_cardbus()
1366 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | in pci_bus_size_cardbus()
1369 b_res->end -= pci_cardbus_mem_size; in pci_bus_size_cardbus()
1379 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW]; in pci_bus_size_cardbus()
1380 if (b_res->parent) in pci_bus_size_cardbus()
1383 b_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1385 b_res->end -= b_res_3_size; in pci_bus_size_cardbus()
1404 list_for_each_entry(dev, &bus->devices, bus_list) { in __pci_bus_size_bridges()
1405 struct pci_bus *b = dev->subordinate; in __pci_bus_size_bridges()
1409 switch (dev->hdr_type) { in __pci_bus_size_bridges()
1423 host = to_pci_host_bridge(bus->bridge); in __pci_bus_size_bridges()
1424 if (!host->size_windows) in __pci_bus_size_bridges()
1427 if (pref && (pref->flags & IORESOURCE_PREFETCH)) in __pci_bus_size_bridges()
1429 hdr_type = -1; /* Intentionally invalid - not a PCI device. */ in __pci_bus_size_bridges()
1431 pref = &bus->self->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in __pci_bus_size_bridges()
1432 hdr_type = bus->self->hdr_type; in __pci_bus_size_bridges()
1442 if (bus->self->is_hotplug_bridge) { in __pci_bus_size_bridges()
1453 * If there's a 64-bit prefetchable MMIO window, compute in __pci_bus_size_bridges()
1454 * the size required to put all 64-bit prefetchable in __pci_bus_size_bridges()
1459 if (pref && (pref->flags & IORESOURCE_MEM_64)) { in __pci_bus_size_bridges()
1467 * If successful, all non-prefetchable resources in __pci_bus_size_bridges()
1468 * and any 32-bit prefetchable resources will go in in __pci_bus_size_bridges()
1469 * the non-prefetchable window. in __pci_bus_size_bridges()
1479 * If there is no 64-bit prefetchable window, compute the in __pci_bus_size_bridges()
1480 * size required to put all prefetchable resources in the in __pci_bus_size_bridges()
1481 * 32-bit prefetchable window (if there is one). in __pci_bus_size_bridges()
1491 * If successful, only non-prefetchable resources in __pci_bus_size_bridges()
1492 * will go in the non-prefetchable window. in __pci_bus_size_bridges()
1504 * non-prefetchable window. This includes: in __pci_bus_size_bridges()
1506 * - all non-prefetchable resources in __pci_bus_size_bridges()
1507 * - 32-bit prefetchable resources if there's a 64-bit in __pci_bus_size_bridges()
1508 * prefetchable window or no prefetchable window at all in __pci_bus_size_bridges()
1509 * - 64-bit prefetchable resources if there's no prefetchable in __pci_bus_size_bridges()
1513 * that used here. Specifically, we cannot put a 32-bit in __pci_bus_size_bridges()
1514 * prefetchable resource in a 64-bit prefetchable window. in __pci_bus_size_bridges()
1539 if ((r->flags & mask) == (parent_r->flags & mask) && in assign_fixed_resource_on_bus()
1556 if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) || in pdev_assign_fixed_resources()
1557 !(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) in pdev_assign_fixed_resources()
1560 b = dev->bus; in pdev_assign_fixed_resources()
1561 while (b && !r->parent) { in pdev_assign_fixed_resources()
1563 b = b->parent; in pdev_assign_fixed_resources()
1577 list_for_each_entry(dev, &bus->devices, bus_list) { in __pci_bus_assign_resources()
1580 b = dev->subordinate; in __pci_bus_assign_resources()
1586 switch (dev->hdr_type) { in __pci_bus_assign_resources()
1598 pci_domain_nr(b), b->number); in __pci_bus_assign_resources()
1615 struct resource *r = &dev->resource[i]; in pci_claim_device_resources()
1617 if (!r->flags || r->parent) in pci_claim_device_resources()
1629 struct resource *r = &dev->resource[i]; in pci_claim_bridge_resources()
1631 if (!r->flags || r->parent) in pci_claim_bridge_resources()
1643 list_for_each_entry(dev, &b->devices, bus_list) { in pci_bus_allocate_dev_resources()
1646 child = dev->subordinate; in pci_bus_allocate_dev_resources()
1657 * Carry out a depth-first search on the PCI bus tree to allocate in pci_bus_allocate_resources()
1661 if (b->self) { in pci_bus_allocate_resources()
1663 pci_claim_bridge_resources(b->self); in pci_bus_allocate_resources()
1666 list_for_each_entry(child, &b->children, node) in pci_bus_allocate_resources()
1686 b = bridge->subordinate; in __pci_bridge_assign_resources()
1692 switch (bridge->class >> 8) { in __pci_bridge_assign_resources()
1703 pci_domain_nr(b), b->number); in __pci_bridge_assign_resources()
1715 struct pci_dev *dev = bus->self; in pci_bridge_release_resources()
1721 b_res = &dev->resource[PCI_BRIDGE_RESOURCES]; in pci_bridge_release_resources()
1725 * 2. If non pref MMIO assignment fails, release bridge nonpref MMIO. in pci_bridge_release_resources()
1748 if (!r->parent) in pci_bridge_release_resources()
1754 type = old_flags = r->flags & PCI_RES_TYPE_MASK; in pci_bridge_release_resources()
1759 r->flags = 0; in pci_bridge_release_resources()
1766 r->flags = old_flags; in pci_bridge_release_resources()
1786 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_release_bridge_resources()
1787 struct pci_bus *b = dev->subordinate; in pci_bus_release_bridge_resources()
1793 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_bus_release_bridge_resources()
1804 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_bus_release_bridge_resources()
1817 if (!res || !res->end || !res->flags) in pci_bus_dump_res()
1820 dev_info(&bus->dev, "resource %d %pR\n", i, res); in pci_bus_dump_res()
1832 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_dump_resources()
1833 b = dev->subordinate; in pci_bus_dump_resources()
1846 list_for_each_entry(child_bus, &bus->children, node) { in pci_bus_get_depth()
1858 * -1: undefined, will auto detect later
1865 undefined = -1,
1892 struct resource *r = &dev->resource[i + PCI_IOV_RESOURCES]; in iov_resources_unassigned()
1896 if (!r->flags) in iov_resources_unassigned()
1899 pcibios_resource_to_bus(dev->bus, ®ion, r); in iov_resources_unassigned()
1919 if (host->preserve_config) in pci_realloc_detect()
1942 if (res->parent) in adjust_bridge_window()
1949 add_size = new_size - size; in adjust_bridge_window()
1953 add_size = size - new_size; in adjust_bridge_window()
1977 align = align ? ALIGN(avail->start, align) - avail->start : 0; in remove_dev_resource()
1979 avail->start = min(avail->start + tmp, avail->end + 1); in remove_dev_resource()
1994 * Make sure prefetchable memory is reduced from in remove_dev_resources()
1995 * the correct resource. Specifically we put 32-bit in remove_dev_resources()
1996 * prefetchable memory in non-prefetchable window in remove_dev_resources()
1997 * if there is a 64-bit prefetchable window. in remove_dev_resources()
2002 if ((res->flags & IORESOURCE_PREFETCH) && in remove_dev_resources()
2003 ((res->flags & IORESOURCE_MEM_64) == in remove_dev_resources()
2004 (mmio_pref->flags & IORESOURCE_MEM_64))) in remove_dev_resources()
2029 struct pci_dev *dev, *bridge = bus->self; in pci_bus_distribute_available_resources()
2032 io_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
2033 mmio_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
2034 mmio_pref_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
2041 if (!io_res->parent && align) in pci_bus_distribute_available_resources()
2045 if (!mmio_res->parent && align) in pci_bus_distribute_available_resources()
2049 if (!mmio_pref_res->parent && align) in pci_bus_distribute_available_resources()
2068 if (dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
2082 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_distribute_available_resources()
2083 if (!dev->is_virtfn) in pci_bus_distribute_available_resources()
2093 * split between non-hotplug bridges. This is to allow possible in pci_bus_distribute_available_resources()
2112 b = dev->subordinate; in pci_bus_distribute_available_resources()
2115 if (hotplug_bridges && !dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
2118 res = &dev->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
2134 io.start -= resource_size(res); in pci_bus_distribute_available_resources()
2136 res = &dev->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
2140 mmio.start -= resource_size(res); in pci_bus_distribute_available_resources()
2142 res = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
2146 mmio_pref.start -= resource_size(res); in pci_bus_distribute_available_resources()
2162 if (!bridge->is_hotplug_bridge) in pci_bridge_distribute_available_resources()
2168 available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_distribute_available_resources()
2169 available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
2170 available_mmio_pref = bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
2172 pci_bus_distribute_available_resources(bridge->subordinate, in pci_bridge_distribute_available_resources()
2188 r = &dev->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_resources_not_assigned()
2189 if (r->flags && !(r->flags & IORESOURCE_STARTALIGN)) in pci_bridge_resources_not_assigned()
2191 r = &dev->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_resources_not_assigned()
2192 if (r->flags && !(r->flags & IORESOURCE_STARTALIGN)) in pci_bridge_resources_not_assigned()
2194 r = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_resources_not_assigned()
2195 if (r->flags && !(r->flags & IORESOURCE_STARTALIGN)) in pci_bridge_resources_not_assigned()
2205 struct pci_dev *dev, *bridge = bus->self; in pci_root_bus_distribute_available_resources()
2210 b = dev->subordinate; in pci_root_bus_distribute_available_resources()
2238 pci_bus_release_bridge_resources(fail_res->dev->bus, in pci_prepare_next_assign_round()
2239 fail_res->flags & PCI_RES_TYPE_MASK, in pci_prepare_next_assign_round()
2245 struct resource *res = fail_res->res; in pci_prepare_next_assign_round()
2246 struct pci_dev *dev = fail_res->dev; in pci_prepare_next_assign_round()
2256 res->flags = 0; in pci_prepare_next_assign_round()
2284 dev_info(&bus->dev, "max bus depth: %d pci_try_num: %d\n", in pci_assign_unassigned_root_bus_resources()
2315 dev_info(&bus->dev, in pci_assign_unassigned_root_bus_resources()
2318 dev_info(&bus->dev, in pci_assign_unassigned_root_bus_resources()
2343 if (ACPI_HANDLE(root_bus->bridge)) in pci_assign_unassigned_resources()
2344 acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge)); in pci_assign_unassigned_resources()
2350 struct pci_bus *parent = bridge->subordinate; in pci_assign_unassigned_bridge_resources()
2409 struct resource *res = &bridge->resource[i]; in pci_reassign_bridge_resources()
2412 if ((res->flags ^ type) & PCI_RES_TYPE_MASK) in pci_reassign_bridge_resources()
2416 if (res->child) in pci_reassign_bridge_resources()
2425 if (res->parent) in pci_reassign_bridge_resources()
2427 res->start = 0; in pci_reassign_bridge_resources()
2428 res->end = 0; in pci_reassign_bridge_resources()
2434 next = bridge->bus ? bridge->bus->self : NULL; in pci_reassign_bridge_resources()
2439 return -ENOENT; in pci_reassign_bridge_resources()
2442 __pci_bus_size_bridges(bridge->subordinate, &added); in pci_reassign_bridge_resources()
2447 ret = -ENOSPC; in pci_reassign_bridge_resources()
2453 if (bridge == dev_res->dev) in pci_reassign_bridge_resources()
2456 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2457 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2472 struct resource *res = dev_res->res; in pci_reassign_bridge_resources()
2474 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2480 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2497 __pci_bus_size_bridges(dev->subordinate, &add_list); in pci_assign_unassigned_bus_resources()