Lines Matching +full:pci +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0
20 #include <linux/phy/phy.h>
21 #include <linux/pci.h>
27 #include "pcie-designware.h"
29 #define to_kirin_pcie(x) dev_get_drvdata((x)->dev)
54 * Max number of connected PCI slots at an external PCI bridge
58 * in-board Ethernet adapter and the other two connected to M.2 and mini
59 * PCI slots.
73 struct dw_pcie *pci; member
75 struct phy *phy; member
81 /* Per-slot PERST# */
86 /* Per-slot clkreq */
93 * Kirin 960 PHY. Can't be split into a PHY driver without changing the
99 /* PHY info located in APB */
140 writel(val, hi3660_pcie_phy->base + reg); in kirin_apb_phy_writel()
146 return readl(hi3660_pcie_phy->base + reg); in kirin_apb_phy_readl()
149 static int hi3660_pcie_phy_get_clk(struct hi3660_pcie_phy *phy) in hi3660_pcie_phy_get_clk() argument
151 struct device *dev = phy->dev; in hi3660_pcie_phy_get_clk()
153 phy->phy_ref_clk = devm_clk_get(dev, "pcie_phy_ref"); in hi3660_pcie_phy_get_clk()
154 if (IS_ERR(phy->phy_ref_clk)) in hi3660_pcie_phy_get_clk()
155 return PTR_ERR(phy->phy_ref_clk); in hi3660_pcie_phy_get_clk()
157 phy->aux_clk = devm_clk_get(dev, "pcie_aux"); in hi3660_pcie_phy_get_clk()
158 if (IS_ERR(phy->aux_clk)) in hi3660_pcie_phy_get_clk()
159 return PTR_ERR(phy->aux_clk); in hi3660_pcie_phy_get_clk()
161 phy->apb_phy_clk = devm_clk_get(dev, "pcie_apb_phy"); in hi3660_pcie_phy_get_clk()
162 if (IS_ERR(phy->apb_phy_clk)) in hi3660_pcie_phy_get_clk()
163 return PTR_ERR(phy->apb_phy_clk); in hi3660_pcie_phy_get_clk()
165 phy->apb_sys_clk = devm_clk_get(dev, "pcie_apb_sys"); in hi3660_pcie_phy_get_clk()
166 if (IS_ERR(phy->apb_sys_clk)) in hi3660_pcie_phy_get_clk()
167 return PTR_ERR(phy->apb_sys_clk); in hi3660_pcie_phy_get_clk()
169 phy->aclk = devm_clk_get(dev, "pcie_aclk"); in hi3660_pcie_phy_get_clk()
170 if (IS_ERR(phy->aclk)) in hi3660_pcie_phy_get_clk()
171 return PTR_ERR(phy->aclk); in hi3660_pcie_phy_get_clk()
176 static int hi3660_pcie_phy_get_resource(struct hi3660_pcie_phy *phy) in hi3660_pcie_phy_get_resource() argument
178 struct device *dev = phy->dev; in hi3660_pcie_phy_get_resource()
184 phy->base = devm_platform_ioremap_resource_byname(pdev, "phy"); in hi3660_pcie_phy_get_resource()
185 if (IS_ERR(phy->base)) in hi3660_pcie_phy_get_resource()
186 return PTR_ERR(phy->base); in hi3660_pcie_phy_get_resource()
188 phy->crgctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3660-crgctrl"); in hi3660_pcie_phy_get_resource()
189 if (IS_ERR(phy->crgctrl)) in hi3660_pcie_phy_get_resource()
190 return PTR_ERR(phy->crgctrl); in hi3660_pcie_phy_get_resource()
192 phy->sysctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3660-sctrl"); in hi3660_pcie_phy_get_resource()
193 if (IS_ERR(phy->sysctrl)) in hi3660_pcie_phy_get_resource()
194 return PTR_ERR(phy->sysctrl); in hi3660_pcie_phy_get_resource()
199 static int hi3660_pcie_phy_start(struct hi3660_pcie_phy *phy) in hi3660_pcie_phy_start() argument
201 struct device *dev = phy->dev; in hi3660_pcie_phy_start()
204 reg_val = kirin_apb_phy_readl(phy, PCIE_APB_PHY_CTRL1); in hi3660_pcie_phy_start()
206 kirin_apb_phy_writel(phy, reg_val, PCIE_APB_PHY_CTRL1); in hi3660_pcie_phy_start()
208 reg_val = kirin_apb_phy_readl(phy, PCIE_APB_PHY_CTRL0); in hi3660_pcie_phy_start()
210 kirin_apb_phy_writel(phy, reg_val, PCIE_APB_PHY_CTRL0); in hi3660_pcie_phy_start()
213 reg_val = kirin_apb_phy_readl(phy, PCIE_APB_PHY_CTRL1); in hi3660_pcie_phy_start()
215 kirin_apb_phy_writel(phy, reg_val, PCIE_APB_PHY_CTRL1); in hi3660_pcie_phy_start()
218 reg_val = kirin_apb_phy_readl(phy, PCIE_APB_PHY_STATUS0); in hi3660_pcie_phy_start()
220 return dev_err_probe(dev, -ETIMEDOUT, in hi3660_pcie_phy_start()
226 static void hi3660_pcie_phy_oe_enable(struct hi3660_pcie_phy *phy) in hi3660_pcie_phy_oe_enable() argument
230 regmap_read(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, &val); in hi3660_pcie_phy_oe_enable()
233 regmap_write(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, val); in hi3660_pcie_phy_oe_enable()
236 static int hi3660_pcie_phy_clk_ctrl(struct hi3660_pcie_phy *phy, bool enable) in hi3660_pcie_phy_clk_ctrl() argument
243 ret = clk_set_rate(phy->phy_ref_clk, REF_CLK_FREQ); in hi3660_pcie_phy_clk_ctrl()
247 ret = clk_prepare_enable(phy->phy_ref_clk); in hi3660_pcie_phy_clk_ctrl()
251 ret = clk_prepare_enable(phy->apb_sys_clk); in hi3660_pcie_phy_clk_ctrl()
255 ret = clk_prepare_enable(phy->apb_phy_clk); in hi3660_pcie_phy_clk_ctrl()
259 ret = clk_prepare_enable(phy->aclk); in hi3660_pcie_phy_clk_ctrl()
263 ret = clk_prepare_enable(phy->aux_clk); in hi3660_pcie_phy_clk_ctrl()
270 clk_disable_unprepare(phy->aux_clk); in hi3660_pcie_phy_clk_ctrl()
272 clk_disable_unprepare(phy->aclk); in hi3660_pcie_phy_clk_ctrl()
274 clk_disable_unprepare(phy->apb_phy_clk); in hi3660_pcie_phy_clk_ctrl()
276 clk_disable_unprepare(phy->apb_sys_clk); in hi3660_pcie_phy_clk_ctrl()
278 clk_disable_unprepare(phy->phy_ref_clk); in hi3660_pcie_phy_clk_ctrl()
285 struct hi3660_pcie_phy *phy = pcie->phy_priv; in hi3660_pcie_phy_power_on() local
289 regmap_write(phy->sysctrl, in hi3660_pcie_phy_power_on()
293 hi3660_pcie_phy_oe_enable(phy); in hi3660_pcie_phy_power_on()
295 ret = hi3660_pcie_phy_clk_ctrl(phy, true); in hi3660_pcie_phy_power_on()
299 /* ISO disable, PCIeCtrl, PHY assert and clk gate clear */ in hi3660_pcie_phy_power_on()
300 regmap_write(phy->sysctrl, in hi3660_pcie_phy_power_on()
302 regmap_write(phy->crgctrl, in hi3660_pcie_phy_power_on()
304 regmap_write(phy->sysctrl, in hi3660_pcie_phy_power_on()
307 ret = hi3660_pcie_phy_start(phy); in hi3660_pcie_phy_power_on()
314 hi3660_pcie_phy_clk_ctrl(phy, false); in hi3660_pcie_phy_power_on()
321 struct device *dev = &pdev->dev; in hi3660_pcie_phy_init()
322 struct hi3660_pcie_phy *phy; in hi3660_pcie_phy_init() local
325 phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL); in hi3660_pcie_phy_init()
326 if (!phy) in hi3660_pcie_phy_init()
327 return -ENOMEM; in hi3660_pcie_phy_init()
329 pcie->phy_priv = phy; in hi3660_pcie_phy_init()
330 phy->dev = dev; in hi3660_pcie_phy_init()
332 ret = hi3660_pcie_phy_get_clk(phy); in hi3660_pcie_phy_init()
336 return hi3660_pcie_phy_get_resource(phy); in hi3660_pcie_phy_init()
341 struct hi3660_pcie_phy *phy = pcie->phy_priv; in hi3660_pcie_phy_power_off() local
344 regmap_write(phy->sysctrl, SCTRL_PCIE_CMOS_OFFSET, 0x00); in hi3660_pcie_phy_power_off()
346 hi3660_pcie_phy_clk_ctrl(phy, false); in hi3660_pcie_phy_power_off()
352 * The non-PHY part starts here
365 struct device *dev = &pdev->dev; in kirin_pcie_get_gpio_enable()
374 return dev_err_probe(dev, -EINVAL, in kirin_pcie_get_gpio_enable()
377 pcie->n_gpio_clkreq = ret; in kirin_pcie_get_gpio_enable()
379 for (i = 0; i < pcie->n_gpio_clkreq; i++) { in kirin_pcie_get_gpio_enable()
380 pcie->id_clkreq_gpio[i] = devm_gpiod_get_index(dev, in kirin_pcie_get_gpio_enable()
383 if (IS_ERR(pcie->id_clkreq_gpio[i])) in kirin_pcie_get_gpio_enable()
384 return dev_err_probe(dev, PTR_ERR(pcie->id_clkreq_gpio[i]), in kirin_pcie_get_gpio_enable()
387 pcie->clkreq_names[i] = devm_kasprintf(dev, GFP_KERNEL, in kirin_pcie_get_gpio_enable()
389 if (!pcie->clkreq_names[i]) in kirin_pcie_get_gpio_enable()
390 return -ENOMEM; in kirin_pcie_get_gpio_enable()
392 gpiod_set_consumer_name(pcie->id_clkreq_gpio[i], in kirin_pcie_get_gpio_enable()
393 pcie->clkreq_names[i]); in kirin_pcie_get_gpio_enable()
403 struct device *dev = &pdev->dev; in kirin_pcie_parse_port()
408 i = pcie->num_slots; in kirin_pcie_parse_port()
410 pcie->id_reset_gpio[i] = devm_fwnode_gpiod_get_index(dev, in kirin_pcie_parse_port()
414 if (IS_ERR(pcie->id_reset_gpio[i])) { in kirin_pcie_parse_port()
415 if (PTR_ERR(pcie->id_reset_gpio[i]) == -ENOENT) in kirin_pcie_parse_port()
417 return dev_err_probe(dev, PTR_ERR(pcie->id_reset_gpio[i]), in kirin_pcie_parse_port()
421 if (pcie->num_slots + 1 >= MAX_PCI_SLOTS) in kirin_pcie_parse_port()
422 return dev_err_probe(dev, -EINVAL, in kirin_pcie_parse_port()
423 "Too many PCI slots!\n"); in kirin_pcie_parse_port()
425 pcie->num_slots++; in kirin_pcie_parse_port()
434 pcie->reset_names[i] = devm_kasprintf(dev, GFP_KERNEL, in kirin_pcie_parse_port()
437 if (!pcie->reset_names[i]) in kirin_pcie_parse_port()
438 return -ENOMEM; in kirin_pcie_parse_port()
440 gpiod_set_consumer_name(pcie->id_reset_gpio[i], in kirin_pcie_parse_port()
441 pcie->reset_names[i]); in kirin_pcie_parse_port()
451 struct device *dev = &pdev->dev; in kirin_pcie_get_resource()
452 struct device_node *node = dev->of_node; in kirin_pcie_get_resource()
460 kirin_pcie->apb = devm_regmap_init_mmio(dev, apb_base, in kirin_pcie_get_resource()
462 if (IS_ERR(kirin_pcie->apb)) in kirin_pcie_get_resource()
463 return PTR_ERR(kirin_pcie->apb); in kirin_pcie_get_resource()
466 kirin_pcie->id_dwc_perst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); in kirin_pcie_get_resource()
467 if (IS_ERR(kirin_pcie->id_dwc_perst_gpio)) in kirin_pcie_get_resource()
468 return dev_err_probe(dev, PTR_ERR(kirin_pcie->id_dwc_perst_gpio), in kirin_pcie_get_resource()
470 gpiod_set_consumer_name(kirin_pcie->id_dwc_perst_gpio, "pcie_perst_bridge"); in kirin_pcie_get_resource()
491 regmap_read(kirin_pcie->apb, SOC_PCIECTRL_CTRL0_ADDR, &val); in kirin_pcie_sideband_dbi_w_mode()
497 regmap_write(kirin_pcie->apb, SOC_PCIECTRL_CTRL0_ADDR, val); in kirin_pcie_sideband_dbi_w_mode()
505 regmap_read(kirin_pcie->apb, SOC_PCIECTRL_CTRL1_ADDR, &val); in kirin_pcie_sideband_dbi_r_mode()
511 regmap_write(kirin_pcie->apb, SOC_PCIECTRL_CTRL1_ADDR, val); in kirin_pcie_sideband_dbi_r_mode()
517 struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata); in kirin_pcie_rd_own_conf() local
522 *val = dw_pcie_read_dbi(pci, where, size); in kirin_pcie_rd_own_conf()
529 struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata); in kirin_pcie_wr_own_conf() local
534 dw_pcie_write_dbi(pci, where, size, val); in kirin_pcie_wr_own_conf()
540 struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata); in kirin_pcie_add_bus() local
541 struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci); in kirin_pcie_add_bus()
544 if (!kirin_pcie->num_slots) in kirin_pcie_add_bus()
548 for (i = 0; i < kirin_pcie->num_slots; i++) { in kirin_pcie_add_bus()
549 ret = gpiod_direction_output_raw(kirin_pcie->id_reset_gpio[i], 1); in kirin_pcie_add_bus()
551 dev_err(pci->dev, "PERST# %s error: %d\n", in kirin_pcie_add_bus()
552 kirin_pcie->reset_names[i], ret); in kirin_pcie_add_bus()
566 static u32 kirin_pcie_read_dbi(struct dw_pcie *pci, void __iomem *base, in kirin_pcie_read_dbi() argument
569 struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci); in kirin_pcie_read_dbi()
579 static void kirin_pcie_write_dbi(struct dw_pcie *pci, void __iomem *base, in kirin_pcie_write_dbi() argument
582 struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci); in kirin_pcie_write_dbi()
589 static int kirin_pcie_link_up(struct dw_pcie *pci) in kirin_pcie_link_up() argument
591 struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci); in kirin_pcie_link_up()
594 regmap_read(kirin_pcie->apb, PCIE_APB_PHY_STATUS0, &val); in kirin_pcie_link_up()
601 static int kirin_pcie_start_link(struct dw_pcie *pci) in kirin_pcie_start_link() argument
603 struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci); in kirin_pcie_start_link()
606 regmap_write(kirin_pcie->apb, PCIE_APP_LTSSM_ENABLE, in kirin_pcie_start_link()
614 pp->bridge->ops = &kirin_pci_ops; in kirin_pcie_host_init()
634 if (kirin_pcie->type == PCIE_KIRIN_INTERNAL_PHY) in kirin_pcie_power_off()
637 for (i = 0; i < kirin_pcie->n_gpio_clkreq; i++) in kirin_pcie_power_off()
638 gpiod_direction_output_raw(kirin_pcie->id_clkreq_gpio[i], 1); in kirin_pcie_power_off()
640 phy_power_off(kirin_pcie->phy); in kirin_pcie_power_off()
641 phy_exit(kirin_pcie->phy); in kirin_pcie_power_off()
649 struct device *dev = &pdev->dev; in kirin_pcie_power_on()
652 if (kirin_pcie->type == PCIE_KIRIN_INTERNAL_PHY) { in kirin_pcie_power_on()
661 kirin_pcie->phy = devm_of_phy_get(dev, dev->of_node, NULL); in kirin_pcie_power_on()
662 if (IS_ERR(kirin_pcie->phy)) in kirin_pcie_power_on()
663 return PTR_ERR(kirin_pcie->phy); in kirin_pcie_power_on()
665 ret = phy_init(kirin_pcie->phy); in kirin_pcie_power_on()
669 ret = phy_power_on(kirin_pcie->phy); in kirin_pcie_power_on()
677 ret = gpiod_direction_output_raw(kirin_pcie->id_dwc_perst_gpio, 1); in kirin_pcie_power_on()
694 dw_pcie_host_deinit(&kirin_pcie->pci->pp); in kirin_pcie_remove()
712 { .compatible = "hisilicon,kirin960-pcie", .data = &kirin_960_data },
713 { .compatible = "hisilicon,kirin970-pcie", .data = &kirin_970_data },
719 struct device *dev = &pdev->dev; in kirin_pcie_probe()
722 struct dw_pcie *pci; in kirin_pcie_probe() local
727 return dev_err_probe(dev, -EINVAL, "OF data missing\n"); in kirin_pcie_probe()
731 return -ENOMEM; in kirin_pcie_probe()
733 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL); in kirin_pcie_probe()
734 if (!pci) in kirin_pcie_probe()
735 return -ENOMEM; in kirin_pcie_probe()
737 pci->dev = dev; in kirin_pcie_probe()
738 pci->ops = &kirin_dw_pcie_ops; in kirin_pcie_probe()
739 pci->pp.ops = &kirin_pcie_host_ops; in kirin_pcie_probe()
740 kirin_pcie->pci = pci; in kirin_pcie_probe()
741 kirin_pcie->type = data->phy_type; in kirin_pcie_probe()
753 return dw_pcie_host_init(&pci->pp); in kirin_pcie_probe()
760 .name = "kirin-pcie",