15 #include <linux/dma/edma.h>
132 	/* For non-unrolled iATU/eDMA platforms this range will be ignored */  in dw_pcie_get_resources()
150 	/* eDMA region can be mapped to a custom base address */  in dw_pcie_get_resources()
151 	if (!pci->edma.reg_base) {  in dw_pcie_get_resources()
154 			pci->edma.reg_base = devm_ioremap_resource(pci->dev, res);  in dw_pcie_get_resources()
155 			if (IS_ERR(pci->edma.reg_base))  in dw_pcie_get_resources()
156 				return PTR_ERR(pci->edma.reg_base);  in dw_pcie_get_resources()
158 			pci->edma.reg_base = pci->atu_base + DEFAULT_DBI_DMA_OFFSET;  in dw_pcie_get_resources()
900 		return pci->ops->read_dbi(pci, pci->edma.reg_base, reg, 4);  in dw_pcie_readl_dma()
902 	ret = dw_pcie_read(pci->edma.reg_base + reg, 4, &val);  in dw_pcie_readl_dma()
933 	pci->edma.dev = pci->dev;  in dw_pcie_edma_init_data()
935 	if (!pci->edma.ops)  in dw_pcie_edma_init_data()
936 		pci->edma.ops = &dw_pcie_edma_ops;  in dw_pcie_edma_init_data()
938 	pci->edma.flags |= DW_EDMA_CHIP_LOCAL;  in dw_pcie_edma_init_data()
947 	 * driver. Also ensure that the edma.reg_base is pointing to a valid  in dw_pcie_edma_find_mf()
950 	if (pci->edma.mf != EDMA_MF_EDMA_LEGACY)  in dw_pcie_edma_find_mf()
951 		return pci->edma.reg_base ? 0 : -ENODEV;  in dw_pcie_edma_find_mf()
954 	 * Indirect eDMA CSRs access has been completely removed since v5.40a  in dw_pcie_edma_find_mf()
955 	 * thus no space is now reserved for the eDMA channels viewport and  in dw_pcie_edma_find_mf()
963 	if (val == 0xFFFFFFFF && pci->edma.reg_base) {  in dw_pcie_edma_find_mf()
964 		pci->edma.mf = EDMA_MF_EDMA_UNROLL;  in dw_pcie_edma_find_mf()
966 		pci->edma.mf = EDMA_MF_EDMA_LEGACY;  in dw_pcie_edma_find_mf()
968 		pci->edma.reg_base = pci->dbi_base + PCIE_DMA_VIEWPORT_BASE;  in dw_pcie_edma_find_mf()
986 	if (pci->edma.mf != EDMA_MF_HDMA_NATIVE) {  in dw_pcie_edma_find_channels()
989 		pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val);  in dw_pcie_edma_find_channels()
990 		pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val);  in dw_pcie_edma_find_channels()
994 	if (!pci->edma.ll_wr_cnt || pci->edma.ll_wr_cnt > EDMA_MAX_WR_CH ||  in dw_pcie_edma_find_channels()
995 	    !pci->edma.ll_rd_cnt || pci->edma.ll_rd_cnt > EDMA_MAX_RD_CH)  in dw_pcie_edma_find_channels()
1017 	u16 ch_cnt = pci->edma.ll_wr_cnt + pci->edma.ll_rd_cnt;  in dw_pcie_edma_irq_verify()
1021 	if (pci->edma.nr_irqs == 1)  in dw_pcie_edma_irq_verify()
1023 	else if (pci->edma.nr_irqs > 1)  in dw_pcie_edma_irq_verify()
1024 		return pci->edma.nr_irqs != ch_cnt ? -EINVAL : 0;  in dw_pcie_edma_irq_verify()
1028 		pci->edma.nr_irqs = 1;  in dw_pcie_edma_irq_verify()
1032 	for (; pci->edma.nr_irqs < ch_cnt; pci->edma.nr_irqs++) {  in dw_pcie_edma_irq_verify()
1033 		snprintf(name, sizeof(name), "dma%d", pci->edma.nr_irqs);  in dw_pcie_edma_irq_verify()
1049 	for (i = 0; i < pci->edma.ll_wr_cnt; i++) {  in dw_pcie_edma_ll_alloc()
1050 		ll = &pci->edma.ll_region_wr[i];  in dw_pcie_edma_ll_alloc()
1060 	for (i = 0; i < pci->edma.ll_rd_cnt; i++) {  in dw_pcie_edma_ll_alloc()
1061 		ll = &pci->edma.ll_region_rd[i];  in dw_pcie_edma_ll_alloc()
1078 	/* Don't fail if no eDMA was found (for the backward compatibility) */  in dw_pcie_edma_detect()
1086 		dev_err(pci->dev, "Invalid eDMA IRQs found\n");  in dw_pcie_edma_detect()
1096 	/* Don't fail if the DW eDMA driver can't find the device */  in dw_pcie_edma_detect()
1097 	ret = dw_edma_probe(&pci->edma);  in dw_pcie_edma_detect()
1099 		dev_err(pci->dev, "Couldn't register eDMA device\n");  in dw_pcie_edma_detect()
1103 	dev_info(pci->dev, "eDMA: unroll %s, %hu wr, %hu rd\n",  in dw_pcie_edma_detect()
1104 		 pci->edma.mf == EDMA_MF_EDMA_UNROLL ? "T" : "F",  in dw_pcie_edma_detect()
1105 		 pci->edma.ll_wr_cnt, pci->edma.ll_rd_cnt);  in dw_pcie_edma_detect()
1112 	dw_edma_remove(&pci->edma);  in dw_pcie_edma_remove()