3  * PCIe host controller driver for AMD MDB PCIe Bridge
21 #include "pcie-designware.h"
54  * struct amd_mdb_pcie - PCIe port information
55  * @pci: DesignWare PCIe controller structure
74 	struct amd_mdb_pcie *pcie = irq_data_get_irq_chip_data(data);  in amd_mdb_intx_irq_mask()  local
75 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_intx_irq_mask()
88 	writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_DISABLE_MISC);  in amd_mdb_intx_irq_mask()
94 	struct amd_mdb_pcie *pcie = irq_data_get_irq_chip_data(data);  in amd_mdb_intx_irq_unmask()  local
95 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_intx_irq_unmask()
108 	writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC);  in amd_mdb_intx_irq_unmask()
144 	struct amd_mdb_pcie *pcie = args;  in dw_pcie_rp_intx()  local
148 	val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);  in dw_pcie_rp_intx()
153 			generic_handle_domain_irq(pcie->intx_domain, i);  in dw_pcie_rp_intx()
175 	struct amd_mdb_pcie *pcie = irq_data_get_irq_chip_data(d);  in amd_mdb_event_irq_mask()  local
176 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_event_irq_mask()
183 	writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_DISABLE_MISC);  in amd_mdb_event_irq_mask()
189 	struct amd_mdb_pcie *pcie = irq_data_get_irq_chip_data(d);  in amd_mdb_event_irq_unmask()  local
190 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_event_irq_unmask()
197 	writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC);  in amd_mdb_event_irq_unmask()
224 	struct amd_mdb_pcie *pcie = args;  in amd_mdb_pcie_event()  local
228 	val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);  in amd_mdb_pcie_event()
229 	val &= ~readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_MASK_MISC);  in amd_mdb_pcie_event()
231 		generic_handle_domain_irq(pcie->mdb_domain, i);  in amd_mdb_pcie_event()
232 	writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);  in amd_mdb_pcie_event()
237 static void amd_mdb_pcie_free_irq_domains(struct amd_mdb_pcie *pcie)  in amd_mdb_pcie_free_irq_domains()  argument
239 	if (pcie->intx_domain) {  in amd_mdb_pcie_free_irq_domains()
240 		irq_domain_remove(pcie->intx_domain);  in amd_mdb_pcie_free_irq_domains()
241 		pcie->intx_domain = NULL;  in amd_mdb_pcie_free_irq_domains()
244 	if (pcie->mdb_domain) {  in amd_mdb_pcie_free_irq_domains()
245 		irq_domain_remove(pcie->mdb_domain);  in amd_mdb_pcie_free_irq_domains()
246 		pcie->mdb_domain = NULL;  in amd_mdb_pcie_free_irq_domains()
250 static int amd_mdb_pcie_init_port(struct amd_mdb_pcie *pcie)  in amd_mdb_pcie_init_port()  argument
256 		       pcie->slcr + AMD_MDB_TLP_IR_DISABLE_MISC);  in amd_mdb_pcie_init_port()
259 	val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);  in amd_mdb_pcie_init_port()
261 	writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC);  in amd_mdb_pcie_init_port()
265 		       pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC);  in amd_mdb_pcie_init_port()
272  * @pcie: PCIe port information
277 static int amd_mdb_pcie_init_irq_domains(struct amd_mdb_pcie *pcie,  in amd_mdb_pcie_init_irq_domains()  argument
280 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_pcie_init_irq_domains()
289 		dev_err(dev, "No PCIe Intc node found\n");  in amd_mdb_pcie_init_irq_domains()
293 	pcie->mdb_domain = irq_domain_add_linear(pcie_intc_node, 32,  in amd_mdb_pcie_init_irq_domains()
294 						 &event_domain_ops, pcie);  in amd_mdb_pcie_init_irq_domains()
295 	if (!pcie->mdb_domain) {  in amd_mdb_pcie_init_irq_domains()
301 	irq_domain_update_bus_token(pcie->mdb_domain, DOMAIN_BUS_NEXUS);  in amd_mdb_pcie_init_irq_domains()
303 	pcie->intx_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,  in amd_mdb_pcie_init_irq_domains()
304 						  &amd_intx_domain_ops, pcie);  in amd_mdb_pcie_init_irq_domains()
305 	if (!pcie->intx_domain) {  in amd_mdb_pcie_init_irq_domains()
312 	irq_domain_update_bus_token(pcie->intx_domain, DOMAIN_BUS_WIRED);  in amd_mdb_pcie_init_irq_domains()
318 	amd_mdb_pcie_free_irq_domains(pcie);  in amd_mdb_pcie_init_irq_domains()
326 	struct amd_mdb_pcie *pcie = args;  in amd_mdb_pcie_intr_handler()  local
330 	dev = pcie->pci.dev;  in amd_mdb_pcie_intr_handler()
336 	d = irq_domain_get_irq_data(pcie->mdb_domain, irq);  in amd_mdb_pcie_intr_handler()
345 static int amd_mdb_setup_irq(struct amd_mdb_pcie *pcie,  in amd_mdb_setup_irq()  argument
348 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_setup_irq()
353 	amd_mdb_pcie_init_port(pcie);  in amd_mdb_setup_irq()
363 		irq = irq_create_mapping(pcie->mdb_domain, i);  in amd_mdb_setup_irq()
370 				       IRQF_NO_THREAD, intr_cause[i].sym, pcie);  in amd_mdb_setup_irq()
378 	pcie->intx_irq = irq_create_mapping(pcie->mdb_domain,  in amd_mdb_setup_irq()
380 	if (!pcie->intx_irq) {  in amd_mdb_setup_irq()
385 	err = devm_request_irq(dev, pcie->intx_irq, dw_pcie_rp_intx,  in amd_mdb_setup_irq()
386 			       IRQF_NO_THREAD, NULL, pcie);  in amd_mdb_setup_irq()
395 			       "amd_mdb pcie_irq", pcie);  in amd_mdb_setup_irq()
405 static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,  in amd_mdb_add_pcie_port()  argument
408 	struct dw_pcie *pci = &pcie->pci;  in amd_mdb_add_pcie_port()
413 	pcie->slcr = devm_platform_ioremap_resource_byname(pdev, "slcr");  in amd_mdb_add_pcie_port()
414 	if (IS_ERR(pcie->slcr))  in amd_mdb_add_pcie_port()
415 		return PTR_ERR(pcie->slcr);  in amd_mdb_add_pcie_port()
417 	err = amd_mdb_pcie_init_irq_domains(pcie, pdev);  in amd_mdb_add_pcie_port()
421 	err = amd_mdb_setup_irq(pcie, pdev);  in amd_mdb_add_pcie_port()
438 	amd_mdb_pcie_free_irq_domains(pcie);  in amd_mdb_add_pcie_port()
445 	struct amd_mdb_pcie *pcie;  in amd_mdb_pcie_probe()  local
448 	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);  in amd_mdb_pcie_probe()
449 	if (!pcie)  in amd_mdb_pcie_probe()
452 	pci = &pcie->pci;  in amd_mdb_pcie_probe()
455 	platform_set_drvdata(pdev, pcie);  in amd_mdb_pcie_probe()
457 	return amd_mdb_add_pcie_port(pcie, pdev);  in amd_mdb_pcie_probe()
469 		.name	= "amd-mdb-pcie",