1 // SPDX-License-Identifier: GPL-2.0
25 	dev_dbg(&phydev->mdio.dev, "tr_cmd: 0x%x\n", tr_cmd);  in __mtk_tr_access()
35 	dev_dbg(&phydev->mdio.dev, "tr_high read: 0x%x, tr_low read: 0x%x\n",  in __mtk_tr_read()
44 	dev_dbg(&phydev->mdio.dev, "tr_high write: 0x%x, tr_low write: 0x%x\n",  in __mtk_tr_write()
99 				unsigned long rules,  in mtk_phy_led_hw_is_supported()  argument
103 		return -EINVAL;  in mtk_phy_led_hw_is_supported()
106 	if (rules & ~supported_triggers)  in mtk_phy_led_hw_is_supported()
107 		return -EOPNOTSUPP;  in mtk_phy_led_hw_is_supported()
114 			    unsigned long *rules, u16 on_set,  in mtk_phy_led_hw_ctrl_get()  argument
121 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_led_hw_ctrl_get()
125 		return -EINVAL;  in mtk_phy_led_hw_ctrl_get()
131 		return -EIO;  in mtk_phy_led_hw_ctrl_get()
137 		return -EIO;  in mtk_phy_led_hw_ctrl_get()
142 		set_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
144 		clear_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
147 		set_bit(bit_on, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
149 		clear_bit(bit_on, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
152 		set_bit(bit_blink, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
154 		clear_bit(bit_blink, &priv->led_state);  in mtk_phy_led_hw_ctrl_get()
156 	if (!rules)  in mtk_phy_led_hw_ctrl_get()
160 		*rules |= BIT(TRIGGER_NETDEV_LINK);  in mtk_phy_led_hw_ctrl_get()
163 		*rules |= BIT(TRIGGER_NETDEV_LINK_10);  in mtk_phy_led_hw_ctrl_get()
166 		*rules |= BIT(TRIGGER_NETDEV_LINK_100);  in mtk_phy_led_hw_ctrl_get()
169 		*rules |= BIT(TRIGGER_NETDEV_LINK_1000);  in mtk_phy_led_hw_ctrl_get()
172 		*rules |= BIT(TRIGGER_NETDEV_LINK_2500);  in mtk_phy_led_hw_ctrl_get()
175 		*rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);  in mtk_phy_led_hw_ctrl_get()
178 		*rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);  in mtk_phy_led_hw_ctrl_get()
181 		*rules |= BIT(TRIGGER_NETDEV_RX);  in mtk_phy_led_hw_ctrl_get()
184 		*rules |= BIT(TRIGGER_NETDEV_TX);  in mtk_phy_led_hw_ctrl_get()
191 			    unsigned long rules, u16 on_set,  in mtk_phy_led_hw_ctrl_set()  argument
195 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_led_hw_ctrl_set()
200 		return -EINVAL;  in mtk_phy_led_hw_ctrl_set()
202 	if (rules & BIT(TRIGGER_NETDEV_FULL_DUPLEX))  in mtk_phy_led_hw_ctrl_set()
205 	if (rules & BIT(TRIGGER_NETDEV_HALF_DUPLEX))  in mtk_phy_led_hw_ctrl_set()
208 	if (rules & (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
211 	if (rules & (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
214 	if (rules & (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
217 	if (rules & (BIT(TRIGGER_NETDEV_LINK_2500) | BIT(TRIGGER_NETDEV_LINK)))  in mtk_phy_led_hw_ctrl_set()
220 	if (rules & BIT(TRIGGER_NETDEV_RX)) {  in mtk_phy_led_hw_ctrl_set()
235 	if (rules & BIT(TRIGGER_NETDEV_TX)) {  in mtk_phy_led_hw_ctrl_set()
251 		set_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_set()
253 		clear_bit(bit_netdev, &priv->led_state);  in mtk_phy_led_hw_ctrl_set()
273 		return -EINVAL;  in mtk_phy_led_num_dly_cfg()
289 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_hw_led_on_set()
293 		changed = !test_and_set_bit(bit_on, &priv->led_state);  in mtk_phy_hw_led_on_set()
295 		changed = !!test_and_clear_bit(bit_on, &priv->led_state);  in mtk_phy_hw_led_on_set()
298 					(index ? 16 : 0), &priv->led_state);  in mtk_phy_hw_led_on_set()
314 	struct mtk_socphy_priv *priv = phydev->priv;  in mtk_phy_hw_led_blink_set()
318 		changed = !test_and_set_bit(bit_blink, &priv->led_state);  in mtk_phy_hw_led_blink_set()
320 		changed = !!test_and_clear_bit(bit_blink, &priv->led_state);  in mtk_phy_hw_led_blink_set()
323 			      (index ? 16 : 0), &priv->led_state);  in mtk_phy_hw_led_blink_set()
340 		phydev->drv->led_hw_control_get(phydev, i, NULL);  in mtk_phy_leds_state_init()
344 MODULE_DESCRIPTION("MediaTek Ethernet PHY driver common");